📄 stm32f10x_dma.lst
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298 .thumb
299 .thumb_func
301 DMA_Cmd:
302 .LFB29:
272:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c ****
273:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /**
274:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @brief Enables or disables the specified DMAy Channelx.
275:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and
276:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the
277:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * DMA Channel.
278:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @param NewState: new state of the DMAy Channelx.
279:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * This parameter can be: ENABLE or DISABLE.
280:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @retval : None
281:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** */
282:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState)
283:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** {
303 .loc 1 283 0
304 @ args = 0, pretend = 0, frame = 0
305 @ frame_needed = 0, uses_anonymous_args = 0
306 @ link register save eliminated.
307 .LVL11:
284:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Check the parameters */
285:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
286:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
287:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** if (NewState != DISABLE)
308 .loc 1 287 0
309 0000 19B1 cbz r1, .L36
288:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** {
289:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Enable the selected DMAy Channelx */
290:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMAy_Channelx->CCR |= CCR_ENABLE_Set;
310 .loc 1 290 0
311 0002 0368 ldr r3, [r0, #0]
312 0004 43F00103 orr r3, r3, #1
313 0008 02E0 b .L39
314 .L36:
291:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
292:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** else
293:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** {
294:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Disable the selected DMAy Channelx */
295:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMAy_Channelx->CCR &= CCR_ENABLE_Reset;
315 .loc 1 295 0
316 000a 0368 ldr r3, [r0, #0]
317 000c 23F00103 bic r3, r3, #1
318 .L39:
319 0010 0360 str r3, [r0, #0]
296:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
297:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
320 .loc 1 297 0
321 0012 7047 bx lr
322 .LFE29:
324 .section .text.DMA_ITConfig,"ax",%progbits
325 .align 2
326 .global DMA_ITConfig
327 .thumb
328 .thumb_func
330 DMA_ITConfig:
331 .LFB30:
298:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c ****
299:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /**
300:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @brief Enables or disables the specified DMAy Channelx interrupts.
301:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and
302:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the
303:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * DMA Channel.
304:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @param DMA_IT: specifies the DMA interrupts sources to be enabled
305:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * or disabled.
306:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * This parameter can be any combination of the following values:
307:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA_IT_TC: Transfer complete interrupt mask
308:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA_IT_HT: Half transfer interrupt mask
309:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA_IT_TE: Transfer error interrupt mask
310:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @param NewState: new state of the specified DMA interrupts.
311:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * This parameter can be: ENABLE or DISABLE.
312:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @retval : None
313:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** */
314:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState)
315:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** {
332 .loc 1 315 0
333 @ args = 0, pretend = 0, frame = 0
334 @ frame_needed = 0, uses_anonymous_args = 0
335 @ link register save eliminated.
336 .LVL12:
316:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Check the parameters */
317:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
318:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** assert_param(IS_DMA_CONFIG_IT(DMA_IT));
319:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** assert_param(IS_FUNCTIONAL_STATE(NewState));
320:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** if (NewState != DISABLE)
337 .loc 1 320 0
338 0000 1AB1 cbz r2, .L41
321:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** {
322:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Enable the selected DMA interrupts */
323:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMAy_Channelx->CCR |= DMA_IT;
339 .loc 1 323 0
340 0002 0368 ldr r3, [r0, #0]
341 0004 41EA0303 orr r3, r1, r3
342 0008 02E0 b .L44
343 .L41:
324:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
325:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** else
326:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** {
327:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Disable the selected DMA interrupts */
328:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMAy_Channelx->CCR &= ~DMA_IT;
344 .loc 1 328 0
345 000a 0368 ldr r3, [r0, #0]
346 000c 23EA0103 bic r3, r3, r1
347 .L44:
348 0010 0360 str r3, [r0, #0]
329:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
330:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
349 .loc 1 330 0
350 0012 7047 bx lr
351 .LFE30:
353 .section .text.DMA_GetCurrDataCounter,"ax",%progbits
354 .align 2
355 .global DMA_GetCurrDataCounter
356 .thumb
357 .thumb_func
359 DMA_GetCurrDataCounter:
360 .LFB31:
331:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c ****
332:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /**
333:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @brief Returns the number of remaining data units in the current
334:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * DMAy Channelx transfer.
335:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and
336:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the
337:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * DMA Channel.
338:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @retval : The number of remaining data units in the current DMAy Channelx
339:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * transfer.
340:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** */
341:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx)
342:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** {
361 .loc 1 342 0
362 @ args = 0, pretend = 0, frame = 0
363 @ frame_needed = 0, uses_anonymous_args = 0
364 @ link register save eliminated.
365 .LVL13:
343:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Check the parameters */
344:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
345:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Return the number of remaining data units for DMAy Channelx */
346:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** return ((uint16_t)(DMAy_Channelx->CNDTR));
366 .loc 1 346 0
367 0000 4068 ldr r0, [r0, #4]
368 .LVL14:
347:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
369 .loc 1 347 0
370 0002 80B2 uxth r0, r0
371 0004 7047 bx lr
372 .LFE31:
374 0006 C046 .section .text.DMA_GetFlagStatus,"ax",%progbits
375 .align 2
376 .global DMA_GetFlagStatus
377 .thumb
378 .thumb_func
380 DMA_GetFlagStatus:
381 .LFB32:
348:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c ****
349:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /**
350:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @brief Checks whether the specified DMAy Channelx flag is set or not.
351:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @param DMA_FLAG: specifies the flag to check.
352:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * This parameter can be one of the following values:
353:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag.
354:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
355:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
356:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
357:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag.
358:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
359:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
360:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
361:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag.
362:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
363:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
364:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
365:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag.
366:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
367:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
368:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
369:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag.
370:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
371:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
372:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
373:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag.
374:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag.
375:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag.
376:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag.
377:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag.
378:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag.
379:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag.
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