📄 stm32f10x_dma.lst
字号:
66 0022 33D0 beq .L8
67 .LVL4:
68 0024 11D8 bhi .L15
69 0026 3C3B subs r3, r3, #60
70 0028 9A42 cmp r2, r3
71 002a 29D0 beq .L5
72 002c 06D8 bhi .L16
73 002e 283B subs r3, r3, #40
74 0030 9A42 cmp r2, r3
75 0032 21D0 beq .L3
76 0034 1433 adds r3, r3, #20
77 0036 9A42 cmp r2, r3
78 0038 4BD1 bne .L18
79 003a 1FE0 b .L25
80 .L16:
81 003c 274B ldr r3, .L29+4
82 003e 9A42 cmp r2, r3
83 0040 20D0 beq .L6
84 0042 1433 adds r3, r3, #20
85 0044 9A42 cmp r2, r3
86 0046 44D1 bne .L18
87 0048 1EE0 b .L26
88 .L15:
89 004a 254B ldr r3, .L29+8
90 004c 9A42 cmp r2, r3
91 004e 2CD0 beq .L11
92 0050 08D8 bhi .L17
93 0052 A3F56773 sub r3, r3, #924
94 0056 9A42 cmp r2, r3
95 0058 1DD0 beq .L9
96 005a 03F56273 add r3, r3, #904
97 005e 9A42 cmp r2, r3
98 0060 37D1 bne .L18
99 0062 1DE0 b .L27
100 .L17:
101 0064 1F4B ldr r3, .L29+12
102 0066 9A42 cmp r2, r3
103 0068 29D0 beq .L13
104 006a 1433 adds r3, r3, #20
105 006c 9A42 cmp r2, r3
106 006e 2BD0 beq .L14
107 0070 283B subs r3, r3, #40
108 0072 9A42 cmp r2, r3
109 0074 2DD1 bne .L18
110 0076 1DE0 b .L28
111 .L3:
129:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** {
130:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA1_Channel1_BASE:
131:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA1 Channel1 */
132:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA1->IFCR |= DMA1_Channel1_IT_Mask;
112 .loc 1 132 0
113 0078 1B4A ldr r2, .L29+16
114 007a 12E0 b .L21
115 .L25:
133:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
134:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA1_Channel2_BASE:
135:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA1 Channel2 */
136:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA1->IFCR |= DMA1_Channel2_IT_Mask;
116 .loc 1 136 0
117 007c 1A4A ldr r2, .L29+16
118 007e 15E0 b .L22
119 .L5:
137:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
138:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA1_Channel3_BASE:
139:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA1 Channel3 */
140:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA1->IFCR |= DMA1_Channel3_IT_Mask;
120 .loc 1 140 0
121 0080 194A ldr r2, .L29+16
122 0082 18E0 b .L23
123 .L6:
141:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
142:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA1_Channel4_BASE:
143:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA1 Channel4 */
144:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA1->IFCR |= DMA1_Channel4_IT_Mask;
124 .loc 1 144 0
125 0084 184A ldr r2, .L29+16
126 0086 1BE0 b .L24
127 .L26:
145:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
146:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA1_Channel5_BASE:
147:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA1 Channel5 */
148:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA1->IFCR |= DMA1_Channel5_IT_Mask;
128 .loc 1 148 0
129 0088 174A ldr r2, .L29+16
130 008a 1EE0 b .L20
131 .L8:
149:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
150:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA1_Channel6_BASE:
151:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA1 Channel6 */
152:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA1->IFCR |= DMA1_Channel6_IT_Mask;
132 .loc 1 152 0
133 008c 164A ldr r2, .L29+16
134 008e 5368 ldr r3, [r2, #4]
135 0090 43F47003 orr r3, r3, #15728640
136 0094 1CE0 b .L19
137 .L9:
153:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
154:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA1_Channel7_BASE:
155:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA1 Channel7 */
156:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA1->IFCR |= DMA1_Channel7_IT_Mask;
138 .loc 1 156 0
139 0096 144A ldr r2, .L29+16
140 0098 5368 ldr r3, [r2, #4]
141 009a 43F07063 orr r3, r3, #251658240
142 009e 17E0 b .L19
143 .L27:
157:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
158:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA2_Channel1_BASE:
159:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA2 Channel1 */
160:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA2->IFCR |= DMA2_Channel1_IT_Mask;
144 .loc 1 160 0
145 00a0 124A ldr r2, .L29+20
146 .L21:
147 00a2 5368 ldr r3, [r2, #4]
148 00a4 43F00F03 orr r3, r3, #15
149 00a8 12E0 b .L19
150 .L11:
161:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
162:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA2_Channel2_BASE:
163:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA2 Channel2 */
164:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA2->IFCR |= DMA2_Channel2_IT_Mask;
151 .loc 1 164 0
152 00aa 104A ldr r2, .L29+20
153 .L22:
154 00ac 5368 ldr r3, [r2, #4]
155 00ae 43F0F003 orr r3, r3, #240
156 00b2 0DE0 b .L19
157 .L28:
165:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
166:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA2_Channel3_BASE:
167:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA2 Channel3 */
168:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA2->IFCR |= DMA2_Channel3_IT_Mask;
158 .loc 1 168 0
159 00b4 0D4A ldr r2, .L29+20
160 .L23:
161 00b6 5368 ldr r3, [r2, #4]
162 00b8 43F47063 orr r3, r3, #3840
163 00bc 08E0 b .L19
164 .L13:
169:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
170:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA2_Channel4_BASE:
171:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA2 Channel4 */
172:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA2->IFCR |= DMA2_Channel4_IT_Mask;
165 .loc 1 172 0
166 00be 0B4A ldr r2, .L29+20
167 .L24:
168 00c0 5368 ldr r3, [r2, #4]
169 00c2 43F47043 orr r3, r3, #61440
170 00c6 03E0 b .L19
171 .L14:
173:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
174:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** case DMA2_Channel5_BASE:
175:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** /* Reset interrupt pending bits for DMA2 Channel5 */
176:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** DMA2->IFCR |= DMA2_Channel5_IT_Mask;
172 .loc 1 176 0
173 00c8 084A ldr r2, .L29+20
174 .L20:
175 00ca 5368 ldr r3, [r2, #4]
176 00cc 43F47023 orr r3, r3, #983040
177 .L19:
178 00d0 5360 str r3, [r2, #4]
179 .L18:
177:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
178:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c ****
179:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** default:
180:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** break;
181:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
182:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c **** }
180 .loc 1 182 0
181 00d2 02B0 add sp, sp, #8
182 00d4 7047 bx lr
183 .L30:
184 00d6 C046 .align 2
185 .L29:
186 00d8 6C000240 .word 1073873004
187 00dc 44000240 .word 1073872964
188 00e0 1C040240 .word 1073873948
189 00e4 44040240 .word 1073873988
190 00e8 00000240 .word 1073872896
191 00ec 00040240 .word 1073873920
192 .LFE26:
194 .section .text.DMA_Init,"ax",%progbits
195 .align 2
196 .global DMA_Init
197 .thumb
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -