stm32f10x_pwr.lst

STM32 Mouse DEMO sorry current program is not working enough.

 505:./lib/CMSIS/Core/CM3/core_cm3.h **** #define __CLREX                           __clrex
 506:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 507:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 508:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Return the Base Priority value
 509:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 510:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  none
 511:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return uint32_t BasePriority
 512:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 513:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Return the content of the base priority register
 514:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 515:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE uint32_t  __get_BASEPRI(void)
 516:./lib/CMSIS/Core/CM3/core_cm3.h **** {
 517:./lib/CMSIS/Core/CM3/core_cm3.h ****   register uint32_t __regBasePri         __ASM("basepri");
 518:./lib/CMSIS/Core/CM3/core_cm3.h ****   return(__regBasePri);
 519:./lib/CMSIS/Core/CM3/core_cm3.h **** }
 520:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 521:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 522:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Set the Base Priority value
 523:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 524:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  uint32_t BasePriority
 525:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return none
 526:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 527:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Set the base priority register
 528:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 529:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE void __set_BASEPRI(uint32_t basePri)
 530:./lib/CMSIS/Core/CM3/core_cm3.h **** {
 531:./lib/CMSIS/Core/CM3/core_cm3.h ****   register uint32_t __regBasePri         __ASM("basepri");
 532:./lib/CMSIS/Core/CM3/core_cm3.h ****   __regBasePri = (basePri & 0x1ff);
 533:./lib/CMSIS/Core/CM3/core_cm3.h **** }
 534:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 535:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 536:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Return the Priority Mask value
 537:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 538:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  none
 539:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return uint32_t PriMask
 540:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 541:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Return the state of the priority mask bit from the priority mask
 542:./lib/CMSIS/Core/CM3/core_cm3.h ****  * register
 543:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 544:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE uint32_t __get_PRIMASK(void)
 545:./lib/CMSIS/Core/CM3/core_cm3.h **** {
 546:./lib/CMSIS/Core/CM3/core_cm3.h ****   register uint32_t __regPriMask         __ASM("primask");
 547:./lib/CMSIS/Core/CM3/core_cm3.h ****   return(__regPriMask);
 548:./lib/CMSIS/Core/CM3/core_cm3.h **** }
 549:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 550:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 551:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Set the Priority Mask value
 552:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 553:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  uint32_t PriMask
 554:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return none
 555:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 556:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Set the priority mask bit in the priority mask register
 557:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 558:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE void __set_PRIMASK(uint32_t priMask)
 559:./lib/CMSIS/Core/CM3/core_cm3.h **** {
 560:./lib/CMSIS/Core/CM3/core_cm3.h ****   register uint32_t __regPriMask         __ASM("primask");
 561:./lib/CMSIS/Core/CM3/core_cm3.h ****   __regPriMask = (priMask);
 562:./lib/CMSIS/Core/CM3/core_cm3.h **** }
 563:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 564:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 565:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Return the Fault Mask value
 566:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 567:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  none
 568:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return uint32_t FaultMask
 569:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 570:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Return the content of the fault mask register
 571:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 572:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE uint32_t __get_FAULTMASK(void)
 573:./lib/CMSIS/Core/CM3/core_cm3.h **** {
 574:./lib/CMSIS/Core/CM3/core_cm3.h ****   register uint32_t __regFaultMask       __ASM("faultmask");
 575:./lib/CMSIS/Core/CM3/core_cm3.h ****   return(__regFaultMask);
 576:./lib/CMSIS/Core/CM3/core_cm3.h **** }
 577:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 578:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 579:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Set the Fault Mask value
 580:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 581:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  uint32_t faultMask value
 582:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return none
 583:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 584:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Set the fault mask register
 585:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 586:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE void __set_FAULTMASK(uint32_t faultMask)
 587:./lib/CMSIS/Core/CM3/core_cm3.h **** {
 588:./lib/CMSIS/Core/CM3/core_cm3.h ****   register uint32_t __regFaultMask       __ASM("faultmask");
 589:./lib/CMSIS/Core/CM3/core_cm3.h ****   __regFaultMask = (faultMask & 1);
 590:./lib/CMSIS/Core/CM3/core_cm3.h **** }
 591:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 592:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 593:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Return the Control Register value
 594:./lib/CMSIS/Core/CM3/core_cm3.h ****  * 
 595:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  none
 596:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return uint32_t Control value
 597:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 598:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Return the content of the control register
 599:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 600:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE uint32_t __get_CONTROL(void)
 601:./lib/CMSIS/Core/CM3/core_cm3.h **** {
 602:./lib/CMSIS/Core/CM3/core_cm3.h ****   register uint32_t __regControl         __ASM("control");
 603:./lib/CMSIS/Core/CM3/core_cm3.h ****   return(__regControl);
 604:./lib/CMSIS/Core/CM3/core_cm3.h **** }
 605:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 606:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 607:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Set the Control Register value
 608:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 609:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  uint32_t Control value
 610:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return none
 611:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 612:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Set the control register
 613:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 614:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE void __set_CONTROL(uint32_t control)
 615:./lib/CMSIS/Core/CM3/core_cm3.h **** {
 616:./lib/CMSIS/Core/CM3/core_cm3.h ****   register uint32_t __regControl         __ASM("control");
 617:./lib/CMSIS/Core/CM3/core_cm3.h ****   __regControl = control;
 618:./lib/CMSIS/Core/CM3/core_cm3.h **** }
 619:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 620:./lib/CMSIS/Core/CM3/core_cm3.h **** #endif /* __ARMCC_VERSION  */ 
 621:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 622:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 623:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 624:./lib/CMSIS/Core/CM3/core_cm3.h **** #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
 625:./lib/CMSIS/Core/CM3/core_cm3.h **** /* IAR iccarm specific functions */
 626:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 627:./lib/CMSIS/Core/CM3/core_cm3.h **** #define __enable_irq                              __enable_interrupt        /*!< global Interrupt e
 628:./lib/CMSIS/Core/CM3/core_cm3.h **** #define __disable_irq                             __disable_interrupt       /*!< global Interrupt d
 629:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 630:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE void __enable_fault_irq()         { __ASM ("cpsie f"); }
 631:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE void __disable_fault_irq()        { __ASM ("cpsid f"); }
 632:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 633:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE  void __WFI()                     { __ASM ("wfi"); }
 634:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE  void __WFE()                     { __ASM ("wfe"); }
 635:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE  void __SEV()                     { __ASM ("sev"); }
 636:./lib/CMSIS/Core/CM3/core_cm3.h **** static __INLINE  void __CLREX()                   { __ASM ("clrex"); }
 637:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 638:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 639:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Return the Process Stack Pointer
 640:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 641:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  none
 642:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return uint32_t ProcessStackPointer
 643:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 644:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Return the actual process stack pointer
 645:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 646:./lib/CMSIS/Core/CM3/core_cm3.h **** extern uint32_t __get_PSP(void);
 647:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 648:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 649:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Set the Process Stack Pointer
 650:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 651:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  uint32_t Process Stack Pointer
 652:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return none
 653:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 654:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Assign the value ProcessStackPointer to the MSP 
 655:./lib/CMSIS/Core/CM3/core_cm3.h ****  * (process stack pointer) Cortex processor register
 656:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 657:./lib/CMSIS/Core/CM3/core_cm3.h **** extern void __set_PSP(uint32_t topOfProcStack);
 658:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 659:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 660:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Return the Main Stack Pointer
 661:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 662:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  none
 663:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return uint32_t Main Stack Pointer
 664:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 665:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Return the current value of the MSP (main stack pointer)
 666:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Cortex processor register
 667:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 668:./lib/CMSIS/Core/CM3/core_cm3.h **** extern uint32_t __get_MSP(void);
 669:./lib/CMSIS/Core/CM3/core_cm3.h **** 
 670:./lib/CMSIS/Core/CM3/core_cm3.h **** /**
 671:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @brief  Set the Main Stack Pointer
 672:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 673:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @param  uint32_t Main Stack Pointer
 674:./lib/CMSIS/Core/CM3/core_cm3.h ****  * @return none
 675:./lib/CMSIS/Core/CM3/core_cm3.h ****  *
 676:./lib/CMSIS/Core/CM3/core_cm3.h ****  * Assign the value mainStackPointer to the MSP 
 677:./lib/CMSIS/Core/CM3/core_cm3.h ****  * (main stack pointer) Cortex processor register
 678:./lib/CMSIS/Core/CM3/core_cm3.h ****  */
 679:./lib/CMSIS/Core/CM3/core_cm3.h **** extern void __set_MSP(uint32_t topOfMainStack);