📄 stm32f10x_fsmc.lst
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125:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND
126:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND
127:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @retval : None
128:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** */
129:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** void FSMC_NANDDeInit(uint32_t FSMC_Bank)
130:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** {
70 .loc 1 130 0
71 @ args = 0, pretend = 0, frame = 0
72 @ frame_needed = 0, uses_anonymous_args = 0
73 @ link register save eliminated.
74 .LVL1:
131:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /* Check the parameter */
132:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_NAND_BANK(FSMC_Bank));
133:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c ****
134:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** if(FSMC_Bank == FSMC_Bank2_NAND)
75 .loc 1 134 0
76 0000 1028 cmp r0, #16
135:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** {
136:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /* Set the FSMC_Bank2 registers to their reset values */
137:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank2->PCR2 = 0x00000018;
77 .loc 1 137 0
78 0002 0CBF ite eq
79 0004 054A ldreq r2, .L10
138:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank2->SR2 = 0x00000040;
139:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank2->PMEM2 = 0xFCFCFCFC;
140:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank2->PATT2 = 0xFCFCFCFC;
141:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** }
142:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /* FSMC_Bank3_NAND */
143:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** else
144:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** {
145:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /* Set the FSMC_Bank3 registers to their reset values */
146:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank3->PCR3 = 0x00000018;
80 .loc 1 146 0
81 0006 064A ldrne r2, .L10+4
82 0008 1823 movs r3, #24
83 000a 1360 str r3, [r2, #0]
147:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank3->SR3 = 0x00000040;
84 .loc 1 147 0
85 000c 2833 adds r3, r3, #40
86 000e 5360 str r3, [r2, #4]
148:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank3->PMEM3 = 0xFCFCFCFC;
87 .loc 1 148 0
88 0010 4FF0FC33 mov r3, #-50529028
89 0014 9360 str r3, [r2, #8]
149:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank3->PATT3 = 0xFCFCFCFC;
90 .loc 1 149 0
91 0016 D360 str r3, [r2, #12]
150:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** }
151:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** }
92 .loc 1 151 0
93 0018 7047 bx lr
94 .L11:
95 001a C046 .align 2
96 .L10:
97 001c 600000A0 .word -1610612640
98 0020 800000A0 .word -1610612608
99 .LFE27:
101 .section .text.FSMC_PCCARDDeInit,"ax",%progbits
102 .align 2
103 .global FSMC_PCCARDDeInit
104 .thumb
105 .thumb_func
107 FSMC_PCCARDDeInit:
108 .LFB28:
152:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c ****
153:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /**
154:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @brief Deinitializes the FSMC PCCARD Bank registers to their default
155:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * reset values.
156:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @param None
157:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @retval : None
158:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** */
159:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** void FSMC_PCCARDDeInit(void)
160:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** {
109 .loc 1 160 0
110 @ args = 0, pretend = 0, frame = 0
111 @ frame_needed = 0, uses_anonymous_args = 0
112 @ link register save eliminated.
161:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /* Set the FSMC_Bank4 registers to their reset values */
162:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank4->PCR4 = 0x00000018;
113 .loc 1 162 0
114 0000 054A ldr r2, .L14
115 0002 1823 movs r3, #24
116 0004 1360 str r3, [r2, #0]
163:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank4->SR4 = 0x00000000;
117 .loc 1 163 0
118 0006 0023 movs r3, #0
119 0008 5360 str r3, [r2, #4]
164:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank4->PMEM4 = 0xFCFCFCFC;
120 .loc 1 164 0
121 000a 03F1FC33 add r3, r3, #-50529028
122 000e 9360 str r3, [r2, #8]
165:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank4->PATT4 = 0xFCFCFCFC;
123 .loc 1 165 0
124 0010 D360 str r3, [r2, #12]
166:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank4->PIO4 = 0xFCFCFCFC;
125 .loc 1 166 0
126 0012 1361 str r3, [r2, #16]
167:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** }
127 .loc 1 167 0
128 0014 7047 bx lr
129 .L15:
130 0016 C046 .align 2
131 .L14:
132 0018 A00000A0 .word -1610612576
133 .LFE28:
135 .section .text.FSMC_NORSRAMInit,"ax",%progbits
136 .align 2
137 .global FSMC_NORSRAMInit
138 .thumb
139 .thumb_func
141 FSMC_NORSRAMInit:
142 .LFB29:
168:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c ****
169:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /**
170:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @brief Initializes the FSMC NOR/SRAM Banks according to the
171:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * specified parameters in the FSMC_NORSRAMInitStruct.
172:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @param FSMC_NORSRAMInitStruct : pointer to a FSMC_NORSRAMInitTypeDef
173:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * structure that contains the configuration information for
174:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * the FSMC NOR/SRAM specified Banks.
175:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** * @retval : None
176:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** */
177:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct)
178:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** {
143 .loc 1 178 0
144 @ args = 0, pretend = 0, frame = 0
145 @ frame_needed = 0, uses_anonymous_args = 0
146 .LVL2:
147 0000 70B5 push {r4, r5, r6, lr}
148 .LCFI0:
179:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /* Check the parameters */
180:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_NORSRAM_BANK(FSMC_NORSRAMInitStruct->FSMC_Bank));
181:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_MUX(FSMC_NORSRAMInitStruct->FSMC_DataAddressMux));
182:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_MEMORY(FSMC_NORSRAMInitStruct->FSMC_MemoryType));
183:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_MEMORY_WIDTH(FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth));
184:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_BURSTMODE(FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode));
185:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_WAIT_POLARITY(FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity));
186:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_WRAP_MODE(FSMC_NORSRAMInitStruct->FSMC_WrapMode));
187:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive));
188:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_WRITE_OPERATION(FSMC_NORSRAMInitStruct->FSMC_WriteOperation));
189:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_WAITE_SIGNAL(FSMC_NORSRAMInitStruct->FSMC_WaitSignal));
190:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_EXTENDED_MODE(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode));
191:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_WRITE_BURST(FSMC_NORSRAMInitStruct->FSMC_WriteBurst));
192:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_
193:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_A
194:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_Data
195:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_TURNAROUND_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_Bus
196:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision
197:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLa
198:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessM
199:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c ****
200:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** /* Bank1 NOR/SRAM control register configuration */
201:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] =
149 .loc 1 201 0
150 0002 8168 ldr r1, [r0, #8]
151 0004 4368 ldr r3, [r0, #4]
152 0006 C268 ldr r2, [r0, #12]
153 0008 41EA0303 orr r3, r1, r3
154 000c 1343 orrs r3, r3, r2
155 000e 0269 ldr r2, [r0, #16]
156 0010 866A ldr r6, [r0, #40]
157 0012 1343 orrs r3, r3, r2
158 0014 4269 ldr r2, [r0, #20]
159 0016 0568 ldr r5, [r0, #0]
160 0018 1343 orrs r3, r3, r2
161 001a 8269 ldr r2, [r0, #24]
162 .loc 1 178 0
163 001c 0446 mov r4, r0
164 .loc 1 201 0
165 001e 1343 orrs r3, r3, r2
166 0020 C269 ldr r2, [r0, #28]
167 0022 1343 orrs r3, r3, r2
168 0024 026A ldr r2, [r0, #32]
169 0026 1343 orrs r3, r3, r2
170 0028 426A ldr r2, [r0, #36]
171 002a 1343 orrs r3, r3, r2
172 002c C26A ldr r2, [r0, #44]
173 002e 3343 orrs r3, r3, r6
174 0030 1343 orrs r3, r3, r2
175 0032 4FF02042 mov r2, #-1610612736
202:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** (uint32_t)FSMC_NORSRAMInitStruct->FSMC_DataAddressMux |
203:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_NORSRAMInitStruct->FSMC_MemoryType |
204:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth |
205:lib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c **** FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode |
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