📄 temp_gpif.c
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// This program configures the General Programmable Interface (GPIF) for FX2.
// Please do not modify sections of text which are marked as "DO NOT EDIT ...".
//
// DO NOT EDIT ...
// GPIF Initialization
// Interface Timing Sync
// Internal Ready Init IntRdy=1
// CTL Out Tristate-able Binary
// SingleWrite WF Select 1
// SingleRead WF Select 0
// FifoWrite WF Select 3
// FifoRead WF Select 2
// Data Bus Idle Drive Tristate
// END DO NOT EDIT
// DO NOT EDIT ...
// GPIF Wave Names
// Wave 0 = unused
// Wave 1 = unused
// Wave 2 = FIFORd
// Wave 3 = FIFOWr
// GPIF Ctrl Outputs Level
// CTL 0 = WEN# CMOS
// CTL 1 = REN# CMOS
// CTL 2 = OE# CMOS
// CTL 3 = unused CMOS
// CTL 4 = unused CMOS
// CTL 5 = unused CMOS
// GPIF Rdy Inputs
// RDY0 = EF#
// RDY1 = FF#
// RDY2 = unused
// RDY3 = unused
// RDY4 = unused
// RDY5 = TCXpire
// FIFOFlag = FIFOFlag
// IntReady = IntReady
// END DO NOT EDIT
// DO NOT EDIT ...
//
// GPIF Waveform 0: unused
//
// Interval 0 1 2 3 4 5 6 Idle (7)
// _________ _________ _________ _________ _________ _________ _________ _________
//
// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
// DataMode NO Data NO Data NO Data NO Data NO Data NO Data NO Data
// NextData SameData SameData SameData SameData SameData SameData SameData
// Int Trig No Int No Int No Int No Int No Int No Int No Int
// IF/Wait Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1
// Term A
// LFunc
// Term B
// Branch1
// Branch0
// Re-Exec
// Sngl/CRC Default Default Default Default Default Default Default
// WEN# 1 1 1 1 1 1 1 1
// REN# 1 1 1 1 1 1 1 1
// OE# 1 1 1 1 1 1 1 1
// unused 0 0 0 0 0 0 0 0
// unused 0 0 0 0 0 0 0 0
// unused 0 0 0 0 0 0 0 0
//
// END DO NOT EDIT
// DO NOT EDIT ...
//
// GPIF Waveform 1: unused
//
// Interval 0 1 2 3 4 5 6 Idle (7)
// _________ _________ _________ _________ _________ _________ _________ _________
//
// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
// DataMode NO Data NO Data NO Data NO Data NO Data NO Data NO Data
// NextData SameData SameData SameData SameData SameData SameData SameData
// Int Trig No Int No Int No Int No Int No Int No Int No Int
// IF/Wait Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1
// Term A
// LFunc
// Term B
// Branch1
// Branch0
// Re-Exec
// Sngl/CRC Default Default Default Default Default Default Default
// WEN# 1 1 1 1 1 1 1 1
// REN# 1 1 1 1 1 1 1 1
// OE# 1 1 1 1 1 1 1 1
// unused 0 0 0 0 0 0 0 0
// unused 0 0 0 0 0 0 0 0
// unused 0 0 0 0 0 0 0 0
//
// END DO NOT EDIT
// DO NOT EDIT ...
//
// GPIF Waveform 2: FIFORd
//
// Interval 0 1 2 3 4 5 6 Idle (7)
// _________ _________ _________ _________ _________ _________ _________ _________
//
// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
// DataMode NO Data NO Data NO Data Activate Activate Activate Activate
// NextData SameData SameData SameData SameData SameData SameData SameData
// Int Trig No Int No Int No Int No Int No Int No Int No Int
// IF/Wait Wait 1 Wait 1 Wait 1 IF Wait 1 Wait 1 Wait 1
// Term A TCXpire
// LFunc AND
// Term B TCXpire
// Branch1 ThenIdle
// Branch0 Else 3
// Re-Exec No
// Sngl/CRC Default Default Default Default Default Default Default
// WEN# 1 1 1 1 1 1 1 1
// REN# 1 0 0 1 1 1 1 1
// OE# 1 1 0 1 1 1 1 1
// unused 0 0 0 0 0 0 0 0
// unused 0 0 0 0 0 0 0 0
// unused 0 0 0 0 0 0 0 0
//
// END DO NOT EDIT
// DO NOT EDIT ...
//
// GPIF Waveform 3: FIFOWr
//
// Interval 0 1 2 3 4 5 6 Idle (7)
// _________ _________ _________ _________ _________ _________ _________ _________
//
// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
// DataMode NO Data Activate NO Data NO Data NO Data NO Data NO Data
// NextData SameData SameData SameData SameData SameData SameData SameData
// Int Trig No Int No Int No Int No Int No Int No Int No Int
// IF/Wait Wait 1 IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1
// Term A TCXpire
// LFunc AND
// Term B TCXpire
// Branch1 ThenIdle
// Branch0 Else 1
// Re-Exec No
// Sngl/CRC Default Default Default Default Default Default Default
// WEN# 1 0 0 0 0 0 0 1
// REN# 1 1 1 1 1 1 1 1
// OE# 1 1 0 0 0 0 0 1
// unused 0 0 0 0 0 0 0 0
// unused 0 0 0 0 0 0 0 0
// unused 0 0 0 0 0 0 0 0
//
// END DO NOT EDIT
// GPIF Program Code
// DO NOT EDIT ...
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h" // SYNCDELAY macro
// END DO NOT EDIT
// DO NOT EDIT ...
const char xdata WaveData[128] =
{
// Wave 0
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 1
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 2
/* LenBr */ 0x01, 0x01, 0x01, 0x3B, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x03, 0x02, 0x02, 0x02, 0x00,
/* Output*/ 0x07, 0x05, 0x01, 0x07, 0x07, 0x07, 0x07, 0x07,
/* LFun */ 0x00, 0x00, 0x00, 0x2D, 0x00, 0x00, 0x00, 0x3F,
// Wave 3
/* LenBr */ 0x01, 0x39, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x07, 0x06, 0x02, 0x02, 0x02, 0x02, 0x02, 0x07,
/* LFun */ 0x00, 0x2D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
};
// END DO NOT EDIT
// DO NOT EDIT ...
const char xdata FlowStates[36] =
{
/* Wave 0 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* Wave 1 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* Wave 2 FlowStates */ 0x83,0x36,0x11,0x17,0x00,0x04,0x03,0x02,0x01,
/* Wave 3 FlowStates */ 0x81,0x36,0x16,0x17,0x00,0x04,0x03,0x02,0x01,
};
// END DO NOT EDIT
// DO NOT EDIT ...
const char xdata InitData[7] =
{
/* Regs */ 0xE0,0x00,0x00,0x07,0xEE,0x4E,0x00
};
// END DO NOT EDIT
// TO DO: You may add additional code below.
void GpifInit( void )
{
BYTE i;
// Registers which require a synchronization delay, see section 15.14
// FIFORESET FIFOPINPOLAR
// INPKTEND OUTPKTEND
// EPxBCH:L REVCTL
// GPIFTCB3 GPIFTCB2
// GPIFTCB1 GPIFTCB0
// EPxFIFOPFH:L EPxAUTOINLENH:L
// EPxFIFOCFG EPxGPIFFLGSEL
// PINFLAGSxx EPxFIFOIRQ
// EPxFIFOIE GPIFIRQ
// GPIFIE GPIFADRH:L
// UDMACRCH:L EPxGPIFTRIG
// GPIFTRIG
// Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
// ...these have been replaced by GPIFTC[B3:B0] registers
// 8051 doesn't have access to waveform memories 'til
// the part is in GPIF mode.
IFCONFIG = 0xEE;
// IFCLKSRC=1 , FIFOs executes on internal clk source
// xMHz=1 , 48MHz internal clk rate
// IFCLKOE=0 , Don't drive IFCLK pin signal at 48MHz
// IFCLKPOL=0 , Don't invert IFCLK pin signal from internal clk
// ASYNC=1 , master samples asynchronous
// GSTATE=1 , Drive GPIF states out on PORTE[2:0], debug WF
// IFCFG[1:0]=10, FX2 in GPIF master mode
GPIFABORT = 0xFF; // abort any waveforms pending
GPIFREADYCFG = InitData[ 0 ];
GPIFCTLCFG = InitData[ 1 ];
GPIFIDLECS = InitData[ 2 ];
GPIFIDLECTL = InitData[ 3 ];
GPIFWFSELECT = InitData[ 5 ];
GPIFREADYSTAT = InitData[ 6 ];
// use dual autopointer feature...
AUTOPTRSETUP = 0x07; // inc both pointers,
// ...warning: this introduces pdata hole(s)
// ...at E67B (XAUTODAT1) and E67C (XAUTODAT2)
// source
AUTOPTRH1 = MSB( &WaveData );
AUTOPTRL1 = LSB( &WaveData );
// destination
AUTOPTRH2 = 0xE4;
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