📄 usbf_top.v
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.rx_valid( rx_valid ),
.rx_active( rx_active ),
.rx_err( rx_err ),
.tx_data( tx_data ),
.tx_valid( tx_valid ),
.tx_valid_last( tx_valid_last ),
.tx_ready( tx_ready ),
.tx_first( tx_first ),
.mode_hs( mode_hs ),
.usb_reset( usb_reset ),
.usb_suspend( usb_suspend ),
.usb_attached( usb_attached ),
.resume_req( resume_req_r ),
.suspend_clr( suspend_clr )
);
// Protocol Layer
usbf_pl #(SSRAM_HADR)
u1( .clk( phy_clk_pad_i ),
.rst( rst ),
.rx_data( rx_data ),
.rx_valid( rx_valid ),
.rx_active( rx_active ),
.rx_err( rx_err ),
.tx_data( tx_data ),
.tx_valid( tx_valid ),
.tx_valid_last( tx_valid_last ),
.tx_ready( tx_ready ),
.tx_first( tx_first ),
.tx_valid_out( TxValid_pad_o ),
.mode_hs( mode_hs ),
.usb_reset( usb_reset ),
.usb_suspend( usb_suspend ),
.usb_attached( usb_attached ),
.madr( madr ),
.mdout( mdout ),
.mdin( mdin ),
.mwe( mwe ),
.mreq( mreq ),
.mack( mack ),
.fa( funct_adr ),
.dma_in_buf_sz1( dma_in_buf_sz1 ),
.dma_out_buf_avail( dma_out_buf_avail ),
.idin( idin ),
.ep_sel( ep_sel ),
.match( match ),
.buf0_rl( buf0_rl ),
.buf0_set( buf0_set ),
.buf1_set( buf1_set ),
.uc_bsel_set( uc_bsel_set ),
.uc_dpd_set( uc_dpd_set ),
.int_buf1_set( int_buf1_set ),
.int_buf0_set( int_buf0_set ),
.int_upid_set( int_upid_set ),
.int_crc16_set( int_crc16_set ),
.int_to_set( int_to_set ),
.int_seqerr_set( int_seqerr_set ),
.out_to_small( out_to_small ),
.csr( csr ),
.buf0( buf0 ),
.buf1( buf1 ),
.frm_nat( frm_nat ),
.pid_cs_err( pid_cs_err ),
.nse_err( nse_err ),
.crc5_err( crc5_err )
);
// Memory Arbiter
usbf_mem_arb #(SSRAM_HADR)
u2( .phy_clk( phy_clk_pad_i ),
.wclk( clk_i ),
.rst( rst ),
.sram_adr( sram_adr_o ),
.sram_din( sram_data_i ),
.sram_dout( sram_data_o ),
.sram_re( sram_re_o ),
.sram_we( sram_we_o ),
.madr( madr ),
.mdout( mdin ),
.mdin( mdout ),
.mwe( mwe ),
.mreq( mreq ),
.mack( mack ),
.wadr( ma_adr[SSRAM_HADR + 2:2] ),
.wdout( ma2wb_d ),
.wdin( wb2ma_d ),
.wwe( ma_we ),
.wreq( ma_req ),
.wack( ma_ack )
);
// Register File
usbf_rf u4( .clk( phy_clk_pad_i ),
.wclk( clk_i ),
.rst( rst ),
.adr( ma_adr[8:2] ),
.re( rf_re ),
.we( rf_we ),
.din( wb2rf_d ),
.dout( rf2wb_d ),
.inta( inta_o ),
.intb( intb_o ),
.dma_req( dma_req_o ),
.dma_ack( dma_ack_i ),
.idin( idin ),
.ep_sel( ep_sel ),
.match( match ),
.buf0_rl( buf0_rl ),
.buf0_set( buf0_set ),
.buf1_set( buf1_set ),
.uc_bsel_set( uc_bsel_set ),
.uc_dpd_set( uc_dpd_set ),
.int_buf1_set( int_buf1_set ),
.int_buf0_set( int_buf0_set ),
.int_upid_set( int_upid_set ),
.int_crc16_set( int_crc16_set ),
.int_to_set( int_to_set ),
.int_seqerr_set( int_seqerr_set ),
.out_to_small( out_to_small ),
.csr( csr ),
.buf0( buf0 ),
.buf1( buf1 ),
.funct_adr( funct_adr ),
.dma_in_buf_sz1( dma_in_buf_sz1 ),
.dma_out_buf_avail( dma_out_buf_avail ),
.frm_nat( frm_nat ),
.utmi_vend_stat( VStatus_r ),
.utmi_vend_ctrl( VControl_pad_o ),
.utmi_vend_wr( VControl_Load_pad_o ),
.line_stat( LineState_r ),
.usb_attached( usb_attached ),
.mode_hs( mode_hs ),
.suspend( usb_suspend ),
.attached( usb_attached ),
.usb_reset( usb_reset ),
.pid_cs_err( pid_cs_err ),
.nse_err( nse_err ),
.crc5_err( crc5_err ),
.rx_err( rx_err ),
.rf_resume_req( rf_resume_req )
);
// WISHBONE Interface
usbf_wb u5( .phy_clk( phy_clk_pad_i ),
.wb_clk( clk_i ),
.rst( rst ),
.wb_addr_i( wb_addr_i ),
.wb_data_i( wb_data_i ),
.wb_data_o( wb_data_o ),
.wb_ack_o( wb_ack_o ),
.wb_we_i( wb_we_i ),
.wb_stb_i( wb_stb_i ),
.wb_cyc_i( wb_cyc_i ),
.ma_adr( ma_adr ),
.ma_dout( wb2ma_d ),
.ma_din( ma2wb_d ),
.ma_we( ma_we ),
.ma_req( ma_req ),
.ma_ack( ma_ack ),
.rf_re( rf_re ),
.rf_we( rf_we ),
.rf_dout( wb2rf_d ),
.rf_din( rf2wb_d )
);
///////////////////////////////////////////////////////////////////
//
// Initialization
// This section does not add any functionality. It is only provided
// to make sure that the core is configured properly and to provide
// configuration information for simulations.
//
// synopsys translate_off
integer ep_cnt, ep_cnt2;
reg [15:0] ep_check;
initial
begin
$display("\n");
ep_cnt = 1;
ep_cnt2 = 0;
ep_check = 0;
`ifdef USBF_HAVE_EP1
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP2
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP3
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP4
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP5
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP6
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP7
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP8
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP9
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP10
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP11
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP12
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP13
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP14
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
ep_cnt2 = ep_cnt2 + 1;
`ifdef USBF_HAVE_EP15
if(!ep_check[ep_cnt2-1])
$display("ERROR: USBF_TOP: Endpoint %0d not defined but endpoint %0d defined", ep_cnt2, ep_cnt2+1);
ep_cnt = ep_cnt + 1;
ep_check[ep_cnt2] = 1;
`endif
$display("");
$display("INFO: USB Function core instantiated (%m)");
$display(" Supported Endpoints: %0d (0 through %0d)",ep_cnt, ep_cnt-1);
$display(" WISHBONE Address bus size: A%0d:0", `USBF_UFC_HADR );
$display(" SSRAM Address bus size: A%0d:0", SSRAM_HADR );
$display(" Buffer Memory Size: %0d bytes", (1<<SSRAM_HADR+1) * 4 );
$display("");
end
// synopsys translate_on
endmodule
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