📄 altsyncram_b7r.tdf
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PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a12 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 12,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a13 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 13,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a14 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 14,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a15 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 15,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a16 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 16,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a17 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 17,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a18 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 18,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a19 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 19,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a20 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 20,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a21 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 21,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a22 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 22,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
ram_block1a23 : cyclone_ram_block
WITH (
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "D:/ourcpu/lpm_myrom.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
PORT_A_ADDRESS_CLEAR = "none",
PORT_A_ADDRESS_WIDTH = 8,
PORT_A_DATA_OUT_CLEAR = "none",
PORT_A_DATA_OUT_CLOCK = "clock0",
PORT_A_DATA_WIDTH = 1,
PORT_A_FIRST_ADDRESS = 0,
PORT_A_FIRST_BIT_NUMBER = 23,
PORT_A_LAST_ADDRESS = 255,
PORT_A_LOGICAL_RAM_DEPTH = 256,
PORT_A_LOGICAL_RAM_WIDTH = 24,
RAM_BLOCK_TYPE = "auto"
);
BEGIN
ram_block1a[23..0].clk0 = clock0;
ram_block1a[0].portaaddr[] = ( address_a[7..0]);
ram_block1a[1].portaaddr[] = ( address_a[7..0]);
ram_block1a[2].portaaddr[] = ( address_a[7..0]);
ram_block1a[3].portaaddr[] = ( address_a[7..0]);
ram_block1a[4].portaaddr[] = ( address_a[7..0]);
ram_block1a[5].portaaddr[] = ( address_a[7..0]);
ram_block1a[6].portaaddr[] = ( address_a[7..0]);
ram_block1a[7].portaaddr[] = ( address_a[7..0]);
ram_block1a[8].portaaddr[] = ( address_a[7..0]);
ram_block1a[9].portaaddr[] = ( address_a[7..0]);
ram_block1a[10].portaaddr[] = ( address_a[7..0]);
ram_block1a[11].portaaddr[] = ( address_a[7..0]);
ram_block1a[12].portaaddr[] = ( address_a[7..0]);
ram_block1a[13].portaaddr[] = ( address_a[7..0]);
ram_block1a[14].portaaddr[] = ( address_a[7..0]);
ram_block1a[15].portaaddr[] = ( address_a[7..0]);
ram_block1a[16].portaaddr[] = ( address_a[7..0]);
ram_block1a[17].portaaddr[] = ( address_a[7..0]);
ram_block1a[18].portaaddr[] = ( address_a[7..0]);
ram_block1a[19].portaaddr[] = ( address_a[7..0]);
ram_block1a[20].portaaddr[] = ( address_a[7..0]);
ram_block1a[21].portaaddr[] = ( address_a[7..0]);
ram_block1a[22].portaaddr[] = ( address_a[7..0]);
ram_block1a[23].portaaddr[] = ( address_a[7..0]);
q_a[] = ( ram_block1a[23..0].portadataout[0..0]);
END;
--VALID FILE
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