mycpu.fit.eqn

Quantums 5.0开发环境

--M3L22 is 8cpu:92|pc:65|74161:9|f74161:sub|110~COMBOUT at LC_X19_Y8_N7
--operation mode is normal

M3L22 = U4L91 & M3_110 # !U4L91 & (U4L81);

--M3_110 is 8cpu:92|pc:65|74161:9|f74161:sub|110 at LC_X19_Y8_N7
--operation mode is normal

M3_110 = DFFEAS(M3L22, GLOBAL(H1L3), CLRN, , , M3_107, , , 61);


--H1_12 is 8cpu:92|12 at LC_X27_Y10_N7
--operation mode is normal

B1_19_qfbk = B1_19;
H1_12 = CLK & B1_19_qfbk & J1L2;

--B1_19 is 74273b:2|19 at LC_X27_Y10_N7
--operation mode is normal

B1_19 = DFFEAS(H1_12, GLOBAL(40), CLRN, , , L1_q_a[0], , , VCC);


--M3L91 is 8cpu:92|pc:65|74161:9|f74161:sub|99~COMBOUT at LC_X19_Y8_N5
--operation mode is normal

M3L91 = U4L91 & (M3_99) # !U4L91 & U4L41;

--M3_99 is 8cpu:92|pc:65|74161:9|f74161:sub|99 at LC_X19_Y8_N5
--operation mode is normal

M3_99 = DFFEAS(M3L91, GLOBAL(H1L3), CLRN, , , M3L61, , , 61);


--M3L41 is 8cpu:92|pc:65|74161:9|f74161:sub|87~COMBOUT at LC_X16_Y8_N9
--operation mode is normal

M3L41 = U4L91 & M3_87 # !U4L91 & (U4L21);

--M3_87 is 8cpu:92|pc:65|74161:9|f74161:sub|87 at LC_X16_Y8_N9
--operation mode is normal

M3_87 = DFFEAS(M3L41, GLOBAL(H1L3), CLRN, , , M3L11, , , 61);


--M3L2 is 8cpu:92|pc:65|74161:9|f74161:sub|9~COMBOUT at LC_X16_Y8_N6
--operation mode is normal

M3L2 = U4L91 & M3_9 # !U4L91 & (U4L01);

--M3_9 is 8cpu:92|pc:65|74161:9|f74161:sub|9 at LC_X16_Y8_N6
--operation mode is normal

M3_9 = DFFEAS(M3L2, GLOBAL(H1L3), CLRN, , , M3L4, , , 61);


--M2L12 is 8cpu:92|pc:65|74161:8|f74161:sub|110~COMBOUT at LC_X20_Y7_N6
--operation mode is normal

M2L12 = U4L91 & (M2_110) # !U4L91 & U4L8;

--M2_110 is 8cpu:92|pc:65|74161:8|f74161:sub|110 at LC_X20_Y7_N6
--operation mode is normal

M2_110 = DFFEAS(M2L12, GLOBAL(H1L3), CLRN, , , M2L81, , , 61);


--M2L61 is 8cpu:92|pc:65|74161:8|f74161:sub|99~COMBOUT at LC_X20_Y7_N9
--operation mode is normal

M2L61 = U4L91 & M2_99 # !U4L91 & (U4L6);

--M2_99 is 8cpu:92|pc:65|74161:8|f74161:sub|99 at LC_X20_Y7_N9
--operation mode is normal

M2_99 = DFFEAS(M2L61, GLOBAL(H1L3), CLRN, , , M2L31, , , 61);


--M2L11 is 8cpu:92|pc:65|74161:8|f74161:sub|87~COMBOUT at LC_X21_Y7_N4
--operation mode is normal

M2L11 = U4L91 & M2_87 # !U4L91 & (U4L4);

--M2_87 is 8cpu:92|pc:65|74161:8|f74161:sub|87 at LC_X21_Y7_N4
--operation mode is normal

M2_87 = DFFEAS(M2L11, GLOBAL(H1L3), CLRN, , , M2L8, , , 61);


--M2L2 is 8cpu:92|pc:65|74161:8|f74161:sub|9~COMBOUT at LC_X20_Y7_N5
--operation mode is normal

M2L2 = U4L91 & (M2L4) # !U4L91 & U4L2;

--M2_9 is 8cpu:92|pc:65|74161:8|f74161:sub|9 at LC_X20_Y7_N5
--operation mode is normal

M2_9 = DFFEAS(M2L2, GLOBAL(H1L3), CLRN, , , M2L5, , , 61);


--L1_q_a[3] is lpm_rom0:7|altsyncram:altsyncram_component|altsyncram_b7r:auto_generated|q_a[3] at M4K_X17_Y10
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 6
--Port A Logical Depth: 256, Port A Logical Width: 24
--Port A Input: Registered, Port A Output: Registered
L1_q_a[3]_PORT_A_address = BUS(M1_9, M1_87, M1_99, M1_110, B3_15, B3_14, 24, 25);
L1_q_a[3]_PORT_A_address_reg = DFFE(L1_q_a[3]_PORT_A_address, L1_q_a[3]_clock_0, , , );
L1_q_a[3]_clock_0 = GLOBAL(CLK);
L1_q_a[3]_PORT_A_data_out = MEMORY(, , L1_q_a[3]_PORT_A_address_reg, , , , , , L1_q_a[3]_clock_0, , , , , );
L1_q_a[3]_PORT_A_data_out_reg = DFFE(L1_q_a[3]_PORT_A_data_out, L1_q_a[3]_clock_0, , , );
L1_q_a[3] = L1_q_a[3]_PORT_A_data_out_reg[0];

--L1_q_a[21] is lpm_rom0:7|altsyncram:altsyncram_component|altsyncram_b7r:auto_generated|q_a[21] at M4K_X17_Y10
L1_q_a[3]_PORT_A_address = BUS(M1_9, M1_87, M1_99, M1_110, B3_15, B3_14, 24, 25);
L1_q_a[3]_PORT_A_address_reg = DFFE(L1_q_a[3]_PORT_A_address, L1_q_a[3]_clock_0, , , );
L1_q_a[3]_clock_0 = GLOBAL(CLK);
L1_q_a[3]_PORT_A_data_out = MEMORY(, , L1_q_a[3]_PORT_A_address_reg, , , , , , L1_q_a[3]_clock_0, , , , , );
L1_q_a[3]_PORT_A_data_out_reg = DFFE(L1_q_a[3]_PORT_A_data_out, L1_q_a[3]_clock_0, , , );
L1_q_a[21] = L1_q_a[3]_PORT_A_data_out_reg[5];

--L1_q_a[8] is lpm_rom0:7|altsyncram:altsyncram_component|altsyncram_b7r:auto_generated|q_a[8] at M4K_X17_Y10
L1_q_a[3]_PORT_A_address = BUS(M1_9, M1_87, M1_99, M1_110, B3_15, B3_14, 24, 25);
L1_q_a[3]_PORT_A_address_reg = DFFE(L1_q_a[3]_PORT_A_address, L1_q_a[3]_clock_0, , , );
L1_q_a[3]_clock_0 = GLOBAL(CLK);
L1_q_a[3]_PORT_A_data_out = MEMORY(, , L1_q_a[3]_PORT_A_address_reg, , , , , , L1_q_a[3]_clock_0, , , , , );
L1_q_a[3]_PORT_A_data_out_reg = DFFE(L1_q_a[3]_PORT_A_data_out, L1_q_a[3]_clock_0, , , );
L1_q_a[8] = L1_q_a[3]_PORT_A_data_out_reg[4];

--L1_q_a[11] is lpm_rom0:7|altsyncram:altsyncram_component|altsyncram_b7r:auto_generated|q_a[11] at M4K_X17_Y10
L1_q_a[3]_PORT_A_address = BUS(M1_9, M1_87, M1_99, M1_110, B3_15, B3_14, 24, 25);
L1_q_a[3]_PORT_A_address_reg = DFFE(L1_q_a[3]_PORT_A_address, L1_q_a[3]_clock_0, , , );
L1_q_a[3]_clock_0 = GLOBAL(CLK);
L1_q_a[3]_PORT_A_data_out = MEMORY(, , L1_q_a[3]_PORT_A_address_reg, , , , , , L1_q_a[3]_clock_0, , , , , );
L1_q_a[3]_PORT_A_data_out_reg = DFFE(L1_q_a[3]_PORT_A_data_out, L1_q_a[3]_clock_0, , , );
L1_q_a[11] = L1_q_a[3]_PORT_A_data_out_reg[3];

--L1_q_a[0] is lpm_rom0:7|altsyncram:altsyncram_component|altsyncram_b7r:auto_generated|q_a[0] at M4K_X17_Y10
L1_q_a[3]_PORT_A_address = BUS(M1_9, M1_87, M1_99, M1_110, B3_15, B3_14, 24, 25);
L1_q_a[3]_PORT_A_address_reg = DFFE(L1_q_a[3]_PORT_A_address, L1_q_a[3]_clock_0, , , );
L1_q_a[3]_clock_0 = GLOBAL(CLK);
L1_q_a[3]_PORT_A_data_out = MEMORY(, , L1_q_a[3]_PORT_A_address_reg, , , , , , L1_q_a[3]_clock_0, , , , , );
L1_q_a[3]_PORT_A_data_out_reg = DFFE(L1_q_a[3]_PORT_A_data_out, L1_q_a[3]_clock_0, , , );
L1_q_a[0] = L1_q_a[3]_PORT_A_data_out_reg[2];

--L1_q_a[2] is lpm_rom0:7|altsyncram:altsyncram_component|altsyncram_b7r:auto_generated|q_a[2] at M4K_X17_Y10
L1_q_a[3]_PORT_A_address = BUS(M1_9, M1_87, M1_99, M1_110, B3_15, B3_14, 24, 25);
L1_q_a[3]_PORT_A_address_reg = DFFE(L1_q_a[3]_PORT_A_address, L1_q_a[3]_clock_0, , , );
L1_q_a[3]_clock_0 = GLOBAL(CLK);
L1_q_a[3]_PORT_A_data_out = MEMORY(, , L1_q_a[3]_PORT_A_address_reg, , , , , , L1_q_a[3]_clock_0, , , , , );
L1_q_a[3]_PORT_A_data_out_reg = DFFE(L1_q_a[3]_PORT_A_data_out, L1_q_a[3]_clock_0, , , );
L1_q_a[2] = L1_q_a[3]_PORT_A_data_out_reg[1];


--B8_12 is 8cpu:92|alu:62|74273b:5|12 at LC_X20_Y8_N2
--operation mode is normal

B8_12_lut_out = M3L22;
B8_12 = DFFEAS(B8_12_lut_out, GLOBAL(P1_21), VCC, , , , , , );


--B7_12 is 8cpu:92|alu:62|74273b:4|12 at LC_X20_Y8_N5
--operation mode is normal

B7_12_lut_out = M3L22;
B7_12 = DFFEAS(B7_12_lut_out, GLOBAL(P1_18), VCC, , , , , , );


--Y3L5 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~161 at LC_X22_Y6_N6
--operation mode is arithmetic

Y3L5_carry_eqn = (!Y3L21 & Y3L9) # (Y3L21 & Y3L01);
Y3L5 = B7_13 $ B8_13 $ !Y3L5_carry_eqn;

--Y3L6 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~163 at LC_X22_Y6_N6
--operation mode is arithmetic

Y3L6_cout_0 = B7_13 & (B8_13 # !Y3L9) # !B7_13 & B8_13 & !Y3L9;
Y3L6 = CARRY(Y3L6_cout_0);

--Y3L7 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~163COUT1_201 at LC_X22_Y6_N6
--operation mode is arithmetic

Y3L7_cout_1 = B7_13 & (B8_13 # !Y3L01) # !B7_13 & B8_13 & !Y3L01;
Y3L7 = CARRY(Y3L7_cout_1);


--A1L21 is 91~40 at LC_X19_Y10_N0
--operation mode is normal

A1L21 = B4_12 & (K3);


--A1L31 is 91~41 at LC_X19_Y10_N9
--operation mode is normal

B4_13_qfbk = B4_13;
A1L31 = J1_35 & (A1L21 # B4_13_qfbk) # !CLRN;

--B4_13 is 74273b:21|13 at LC_X19_Y10_N9
--operation mode is normal

B4_13 = DFFEAS(A1L31, GLOBAL(40), CLRN, , , L1_q_a[22], , , VCC);


--M1_9 is 74161:12|f74161:sub|9 at LC_X19_Y10_N1
--operation mode is arithmetic

M1_9_lut_out = !M1_9;
M1_9 = DFFEAS(M1_9_lut_out, 17, !97, , , , , , );

--M1_81 is 74161:12|f74161:sub|81 at LC_X19_Y10_N1
--operation mode is arithmetic

M1_81_cout_0 = M1_9;
M1_81 = CARRY(M1_81_cout_0);

--M1L3 is 74161:12|f74161:sub|81~COUT1_3 at LC_X19_Y10_N1
--operation mode is arithmetic

M1L3_cout_1 = M1_9;
M1L3 = CARRY(M1L3_cout_1);


--M1_87 is 74161:12|f74161:sub|87 at LC_X19_Y10_N2
--operation mode is arithmetic

M1_87_lut_out = M1_87 $ (M1_81);
M1_87 = DFFEAS(M1_87_lut_out, 17, !97, , , , , , );

--M1_85 is 74161:12|f74161:sub|85 at LC_X19_Y10_N2
--operation mode is arithmetic

M1_85_cout_0 = !M1_81 # !M1_87;
M1_85 = CARRY(M1_85_cout_0);

--M1L5 is 74161:12|f74161:sub|85~COUT1 at LC_X19_Y10_N2
--operation mode is arithmetic

M1L5_cout_1 = !M1L3 # !M1_87;
M1L5 = CARRY(M1L5_cout_1);


--M1_99 is 74161:12|f74161:sub|99 at LC_X19_Y10_N3
--operation mode is arithmetic

M1_99_lut_out = M1_99 $ !M1_85;
M1_99 = DFFEAS(M1_99_lut_out, 17, !97, , , , , , );

--M1_95 is 74161:12|f74161:sub|95 at LC_X19_Y10_N3
--operation mode is arithmetic

M1_95_cout_0 = M1_99 & !M1_85;
M1_95 = CARRY(M1_95_cout_0);

--M1L8 is 74161:12|f74161:sub|95~COUT1_2 at LC_X19_Y10_N3
--operation mode is arithmetic

M1L8_cout_1 = M1_99 & !M1L5;
M1L8 = CARRY(M1L8_cout_1);


--M1_110 is 74161:12|f74161:sub|110 at LC_X19_Y10_N4
--operation mode is normal

M1_110_lut_out = M1_110 $ M1_95;
M1_110 = DFFEAS(M1_110_lut_out, 17, !97, , , , , , );


--B3_15 is 74273b:10|15 at LC_X19_Y9_N5
--operation mode is normal

B3_15_lut_out = GND;
B3_15 = DFFEAS(B3_15_lut_out, GLOBAL(19), !76, , , M3L2, , , VCC);


--B3_14 is 74273b:10|14 at LC_X19_Y9_N8
--operation mode is normal

B3_14_lut_out = M3L41;
B3_14 = DFFEAS(B3_14_lut_out, GLOBAL(19), !76, , , , , , );


--24 is 24 at LC_X19_Y9_N6
--operation mode is normal

B3_13_qfbk = B3_13;
24 = K2 # B3_13_qfbk;

--B3_13 is 74273b:10|13 at LC_X19_Y9_N6
--operation mode is normal

B3_13 = DFFEAS(24, GLOBAL(19), !76, , , M3L91, , , VCC);


--25 is 25 at LC_X19_Y9_N7
--operation mode is normal

B3_12_qfbk = B3_12;
25 = B3_12_qfbk # K1;

--B3_12 is 74273b:10|12 at LC_X19_Y9_N7
--operation mode is normal

B3_12 = DFFEAS(25, GLOBAL(19), !76, , , M3L22, , , VCC);


--61 is 61 at LC_X27_Y10_N5
--operation mode is normal

B2_19_qfbk = B2_19;
61 = !J1L2 # !B2_19_qfbk;

--B2_19 is 74273b:3|19 at LC_X27_Y10_N5
--operation mode is normal

B2_19 = DFFEAS(61, GLOBAL(40), CLRN, , , L1_q_a[8], , , VCC);


--H1L3 is 8cpu:92|59~44 at LC_X19_Y10_N7
--operation mode is normal

B2_13_qfbk = B2_13;
H1L3 = CLK & (J1_35 & B2_13_qfbk # !61);

--B2_13 is 74273b:3|13 at LC_X19_Y10_N7
--operation mode is normal

B2_13 = DFFEAS(H1L3, GLOBAL(40), CLRN, , , L1_q_a[14], , , VCC);


--68 is 68 at LC_X21_Y6_N4
--operation mode is normal

B3_19_qfbk = B3_19;
68 = B2_16 & (B3_19_qfbk # B2_15 & B3_17) # !B2_16 & B2_15 & (B3_17);

--B3_19 is 74273b:10|19 at LC_X21_Y6_N4
--operation mode is normal

B3_19 = DFFEAS(68, GLOBAL(19), !76, , , M2L2, , , VCC);


--69 is 69 at LC_X20_Y6_N7
--operation mode is normal

B3_18_qfbk = B3_18;
69 = B2_16 & (B3_18_qfbk # B2_15 & B3_16) # !B2_16 & B2_15 & (B3_16);

--B3_18 is 74273b:10|18 at LC_X20_Y6_N7
--operation mode is normal

B3_18 = DFFEAS(69, GLOBAL(19), !76, , , M2L11, , , VCC);


--Z1L72 is 8cpu:92|bi74670:67|74670c:32|126~11 at LC_X21_Y7_N1
--operation mode is normal

Z1L72 = 68 & (69) # !68 & (69 & Z1_86 # !69 & (Z1_95));


--Z1L82 is 8cpu:92|bi74670:67|74670c:32|126~12 at LC_X20_Y8_N4
--operation mode is normal

Z1L82 = Z1L72 & (Z1_76 # !68) # !Z1L72 & (68 & Z1_85);


--U4L51 is 8cpu:92|busmux:49|lpm_mux:$00000|mux_afc:auto_generated|w_result97w~86 at LC_X15_Y6_N1
--operation mode is normal

B1_15_qfbk = B1_15;
U4L51 = J1L2 & (B1_15_qfbk # B1_12 & B1_13);

--B1_15 is 74273b:2|15 at LC_X15_Y6_N1
--operation mode is normal

B1_15 = DFFEAS(U4L51, GLOBAL(40), CLRN, , , L1_q_a[4], , , VCC);


--U4L61 is 8cpu:92|busmux:49|lpm_mux:$00000|mux_afc:auto_generated|w_result97w~87 at LC_X15_Y6_N3
--operation mode is normal

B1_13_qfbk = B1_13;
U4L61 = J1L2 & B1_13_qfbk & !B1_15;

--B1_13 is 74273b:2|13 at LC_X15_Y6_N3
--operation mode is normal

B1_13 = DFFEAS(U4L61, GLOBAL(40), CLRN, , , L1_q_a[6], , , VCC);


--AB1_q_a[7] is 8cpu:92|lpm_ram_dq0:inst|altsyncram:altsyncram_component|altsyncram_td41:auto_generated|q_a[7] at M4K_X17_Y7
--RAM Block Operation Mode: Single Port
--Port A Depth: 256, Port A Width: 8
--Port A Logical Depth: 256, Port A Logical Width: 8