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<meta name="Generator" content="Timing Report Generator:  version I.27">
<meta name="Author" content="Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.">
<meta name="Description" content="Timing report for top">
<TITLE>Timing report for top</TITLE>
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<A NAME="TimingReport"></a><h1 ALIGN="center" CLASS="cpldta_text_report_header">Timing Report</h1>
<CENTER><SPAN CLASS="cpldta_text_normal_bold"><A HREF="cpldta_glossary.htm"><B>Need help reading this report?</B></A></SPAN></CENTER><BR>
<TABLE  WIDTH="60%" border="1" ALIGN="center">
 <TR>
  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Design Name</B></TD>
  <TD WIDTH="65%" CLASS="cpldta_text_normal">top</TD>
 </TR>
 <TR>
  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Device, Speed (SpeedFile Version)</B></TD>
  <TD WIDTH="65%" CLASS="cpldta_text_normal"><A HREF="Javascript:popWin('http://www.xilinx.com/literature/index.htm','800','800','test');">XC95144XL</A>, -5 (3.0)</TD>
 </TR>
 <TR>
  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Date Created</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Mon Sep 04 21:23:06 2006
</TD>
 </TR>
 <TR>
  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Created By</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Timing Report Generator:  version I.27</TD>
 </TR>
 <TR>
  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Copyright</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.</TD>
 </TR>
</TABLE>
<A NAME="Summary"></a><h2 ALIGN="center" CLASS="cpldta_text_section_header">Summary</h2>
<TABLE  WIDTH="80%" border="1" ALIGN="center">
 <TR CLASS="cpldta_warnings_header">
  <TH BGCOLOR="#FFFFCC" WIDTH="100%">Notes and Warnings</TH>
 </TR>
 <TR>
  <TD WIDTH="100%" CLASS="cpldta_text_normal">Note: This design contains no timing constraints.</TD>
 </TR>
 <TR>
  <TD WIDTH="100%" CLASS="cpldta_text_normal">Note: A default set of constraints using a delay of 0.000ns will be used for analysis.</TD>
 </TR>
</TABLE><BR>
<TABLE WIDTH="80%" border="1" ALIGN="center">
 <TR CLASS="cpldta_warnings_header">
  <TH BGCOLOR="#FFFFCC" WIDTH="100%" colspan="2">Performance Summary</TH>
 </TR>
 <TR>
  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Min. Clock Period</B></TD>
  <TD WIDTH="35%" CLASS="cpldta_text_normal">6.300 ns.</TD>
 </TR>
 <TR>
  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Max. Clock Frequency </B><A HREF="cpldta_glossary.htm#fSYSTEM">(fSYSTEM)</A></TD>
  <TD WIDTH="35%" CLASS="cpldta_text_normal">158.730 MHz. </TD>
 </TR>
 <TR>
  <TD WIDTH="100%" colspan="2" CLASS="cpldta_text_normal">Limited by Cycle Time for sysclk</TD>
 </TR>
 <TR>
  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Clock to Setup </B><A HREF="cpldta_glossary.htm#tCYC">(tCYC)</A></TD>
  <TD WIDTH="35%" CLASS="cpldta_text_normal">6.300 ns. </TD>
 </TR>
 <TR>
  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Pad to Pad Delay </B><A HREF="cpldta_glossary.htm#tPD">(tPD)</A></TD>
  <TD WIDTH="35%" CLASS="cpldta_text_normal">5.000 ns. </TD>
 </TR>
 <TR>
  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Setup to Clock at the Pad </B><A HREF="cpldta_glossary.htm#tSU">(tSU)</A></TD>
  <TD WIDTH="35%" CLASS="cpldta_text_normal">3.700 ns. </TD>
 </TR>
 <TR>
  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Clock Pad to Output Pad Delay </B><A HREF="cpldta_glossary.htm#tCO">(tCO)</A></TD>
  <TD WIDTH="35%" CLASS="cpldta_text_normal">12.300 ns. </TD>
 </TR>
</TABLE>
<HR>
<A NAME="TimingConstraints"></a><h2 ALIGN="center" CLASS="cpldta_text_section_header">Timing Constraints</h2>
<TABLE  WIDTH="80%" border="1" ALIGN="center">
 <TR>
  <TH BGCOLOR="#FFFFCC" CLASS="cpldta_constraint_header">Constraint Name</TH>
  <TH BGCOLOR="#FFFFCC" WIDTH="15%" CLASS="cpldta_time_header">Requirement (ns)</TH>
  <TH BGCOLOR="#FFFFCC" WIDTH="15%" CLASS="cpldta_time_header">Delay (ns)</TH>
  <TH BGCOLOR="#FFFFCC" WIDTH="15%" CLASS="cpldta_time_header">Paths</TH>
  <TH BGCOLOR="#FFFFCC" WIDTH="15%" CLASS="cpldta_time_header">Paths Failing</TH>
 </TR>
 <TR>
  <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS1000">TS1000</A></TD>
  <TD ALIGN="center" CLASS="cpldta_time_value">0.0</TD>
  <TD ALIGN="center" CLASS="cpldta_time_value">0.0</TD>
  <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
  <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
 </TR>
 <TR>
  <TD BGCOLOR="#FFCCCC" ALIGN="left" CLASS="cpldta_constraint_name_error"><A HREF="#AUTO_TS_F2F">AUTO_TS_F2F</A></TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">0.0</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">6.3</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">513</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">513</TD>
 </TR>
 <TR>
  <TD BGCOLOR="#FFCCCC" ALIGN="left" CLASS="cpldta_constraint_name_error"><A HREF="#AUTO_TS_P2P">AUTO_TS_P2P</A></TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">0.0</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">12.3</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">86</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">86</TD>
 </TR>
 <TR>
  <TD BGCOLOR="#FFCCCC" ALIGN="left" CLASS="cpldta_constraint_name_error"><A HREF="#AUTO_TS_P2F">AUTO_TS_P2F</A></TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">0.0</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">4.8</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">7</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">7</TD>
 </TR>
 <TR>
  <TD BGCOLOR="#FFCCCC" ALIGN="left" CLASS="cpldta_constraint_name_error"><A HREF="#AUTO_TS_F2P">AUTO_TS_F2P</A></TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">0.0</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">11.2</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">64</TD>
  <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error">64</TD>
 </TR>
</TABLE>
</BR>
</BR>
<A NAME="TS1000">
<h3 CLASS="cpldta_text_subsection_header">Constraint: TS1000</h3>
 <TABLE  WIDTH="80%" border="1" ALIGN="center">
  <CAPTION CLASS="cpldta_text_caption"><B>Description: PERIOD:PERIOD_sysclk:0.000 nS</B></CAPTION>
  <TR CLASS="cpldta_delaytable_header">
   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Path</TH>
   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Requirement (ns)</TH>
   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay (ns)</TH>
   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Slack (ns)</TH>
  </TR>
 </TABLE>
 </BR>
 </BR>
<A NAME="AUTO_TS_F2F">
<h3 CLASS="cpldta_text_subsection_header">Constraint: AUTO_TS_F2F</h3>
 <TABLE  WIDTH="80%" border="1" ALIGN="center">
  <CAPTION CLASS="cpldta_text_caption"><B>Description: MAXDELAY:FROM:FFS(*):TO:FFS(*):0.000 nS</B></CAPTION>
  <TR CLASS="cpldta_delaytable_header">
   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Path</TH>
   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Requirement (ns)</TH>
   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay (ns)</TH>
   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Slack (ns)</TH>
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   <A NAME="_led_count_0__Q_to_led_count_0__D"></A>
   <TD BGCOLOR="#FFCCCC" ALIGN="left" CLASS="cpldta_constraint_name_error" WIDTH="40%"><A HREF="javascript:AUTO_TS_F2F_led_count_0__Q_to_led_count_0__D();">led_count<0>.Q to led_count<0>.D</A></TD>
   <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error" WIDTH="10%">0.000</TD>
   <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error" WIDTH="10%">6.300</TD>
   <TD BGCOLOR="#FFCCCC" ALIGN="center" CLASS="cpldta_time_value_error" WIDTH="10%">-6.300</TD>
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