📄 stm32f10x_tim.s

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        LDR.N    R2,??TIM_SetIC2Prescaler_0  ;; 0xf3ff
        ANDS     R2,R2,R3
        MOVS     R3,R2
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        LSLS     R2,R1,#+8
        UXTH     R2,R2            ;; ZeroExtS R2,R2,#+16,#+16
        ORRS     R2,R2,R3
        MOVS     R3,R2
        STRH     R3,[R0, #+24]
        BX       LR               ;; return
        Nop      
        DATA
??TIM_SetIC2Prescaler_0:
        DC32     0xf3ff

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_SetIC3Prescaler:
        MOVS     R3,#+0
        MOVS     R2,R3
        LDRH     R3,[R0, #+28]
        MOVS     R2,R3
        MOVS     R3,R2
        LDR.N    R2,??TIM_SetIC3Prescaler_0  ;; 0xfff3
        ANDS     R2,R2,R3
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        ORRS     R2,R2,R1
        MOVS     R3,R2
        STRH     R3,[R0, #+28]
        BX       LR               ;; return
        DATA
??TIM_SetIC3Prescaler_0:
        DC32     0xfff3

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_SetIC4Prescaler:
        MOVS     R3,#+0
        MOVS     R2,R3
        LDRH     R3,[R0, #+28]
        MOVS     R2,R3
        MOVS     R3,R2
        LDR.N    R2,??TIM_SetIC4Prescaler_0  ;; 0xf3ff
        ANDS     R2,R2,R3
        MOVS     R3,R2
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        LSLS     R2,R1,#+8
        UXTH     R2,R2            ;; ZeroExtS R2,R2,#+16,#+16
        ORRS     R2,R2,R3
        MOVS     R3,R2
        STRH     R3,[R0, #+28]
        BX       LR               ;; return
        Nop      
        DATA
??TIM_SetIC4Prescaler_0:
        DC32     0xf3ff

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_SetClockDivision:
        MOVS     R3,#+0
        MOVS     R2,R3
        LDRH     R3,[R0, #+0]
        MOVS     R2,R3
        UXTB     R2,R2            ;; ZeroExtS R2,R2,#+24,#+24
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        ORRS     R2,R2,R1
        MOVS     R3,R2
        STRH     R3,[R0, #+0]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_GetCapture1:
        LDRH     R0,[R0, #+52]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_GetCapture2:
        LDRH     R0,[R0, #+56]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_GetCapture3:
        LDRH     R0,[R0, #+60]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_GetCapture4:
        ADDS     R0,R0,#+64
        LDRH     R0,[R0, #+0]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_GetCounter:
        LDRH     R0,[R0, #+36]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_GetPrescaler:
        LDRH     R0,[R0, #+40]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_GetFlagStatus:
        PUSH     {R0,R4}
        MOVS     R2,R0
        MOVS     R3,#+0
        MOVS     R0,R3
        LDRH     R3,[R2, #+16]
        ANDS     R3,R3,R1
        MOVS     R4,R3
        UXTH     R4,R4            ;; ZeroExtS R4,R4,#+16,#+16
        SUBS     R4,R4,#+1
        SBCS     R4,R4,R4
        MVNS     R4,R4
        LSRS     R4,R4,#+31
        MOVS     R0,R4
        UXTB     R0,R0            ;; ZeroExtS R0,R0,#+24,#+24
        ADD      SP,SP,#+4
        POP      {R4}
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_ClearFlag:
        LDRH     R2,[R0, #+16]
        BICS     R2,R2,R1
        STRH     R2,[R0, #+16]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_GetITStatus:
        PUSH     {R4,R5}
        MOVS     R2,R0
        MOVS     R5,#+0
        MOVS     R0,R5
        MOVS     R5,#+0
        MOVS     R3,R5
        MOVS     R5,#+0
        MOVS     R4,R5
        LDRH     R5,[R2, #+16]
        ANDS     R5,R5,R1
        MOVS     R3,R5
        LDRH     R5,[R2, #+12]
        ANDS     R5,R5,R1
        MOVS     R4,R5
        UXTH     R3,R3            ;; ZeroExtS R3,R3,#+16,#+16
        CMP      R3,#+0
        BEQ.N    ??TIM_GetITStatus_0
        MOVS     R0,R4
        UXTH     R0,R0            ;; ZeroExtS R0,R0,#+16,#+16
        SUBS     R0,R0,#+1
        SBCS     R0,R0,R0
        MVNS     R0,R0
        LSRS     R0,R0,#+31
        B.N      ??TIM_GetITStatus_1
??TIM_GetITStatus_0:
        MOVS     R5,#+0
        MOVS     R0,R5
??TIM_GetITStatus_1:
        UXTB     R0,R0            ;; ZeroExtS R0,R0,#+24,#+24
        POP      {R4,R5}
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TIM_ClearITPendingBit:
        LDRH     R2,[R0, #+16]
        BICS     R2,R2,R1
        STRH     R2,[R0, #+16]
        BX       LR               ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
PWMI_Config:
        PUSH     {R0,R4-R7,LR}
        MOVS     R7,R0
        MOVS     R4,R1
        MOVS     R0,#+0
        MOVS     R5,R0
        MOVS     R0,#+1
        MOVS     R6,R0
        LDRH     R0,[R4, #+4]
        CMP      R0,#+0
        BNE.N    ??PWMI_Config_0
        MOVS     R0,#+2
        MOVS     R5,R0
        B.N      ??PWMI_Config_1
??PWMI_Config_0:
        MOVS     R0,#+0
        MOVS     R5,R0
??PWMI_Config_1:
        LDRH     R0,[R4, #+6]
        CMP      R0,#+1
        BNE.N    ??PWMI_Config_2
        MOVS     R0,#+2
        MOVS     R6,R0
        B.N      ??PWMI_Config_3
??PWMI_Config_2:
        MOVS     R0,#+1
        MOVS     R6,R0
??PWMI_Config_3:
        LDRH     R0,[R4, #+2]
        CMP      R0,#+0
        BNE.N    ??PWMI_Config_4
        LDRB     R3,[R4, #+10]
        LDRH     R2,[R4, #+6]
        LDRH     R1,[R4, #+4]
        MOVS     R0,R7
        BL       TI1_Config
        LDRH     R1,[R4, #+8]
        MOVS     R0,R7
        BL       TIM_SetIC1Prescaler
        LDRB     R3,[R4, #+10]
        UXTB     R6,R6            ;; ZeroExtS R6,R6,#+24,#+24
        MOVS     R2,R6
        UXTH     R2,R2            ;; ZeroExtS R2,R2,#+16,#+16
        UXTB     R5,R5            ;; ZeroExtS R5,R5,#+24,#+24
        MOVS     R1,R5
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        MOVS     R0,R7
        BL       TI2_Config
        LDRH     R1,[R4, #+8]
        MOVS     R0,R7
        BL       TIM_SetIC2Prescaler
        B.N      ??PWMI_Config_5
??PWMI_Config_4:
        LDRB     R3,[R4, #+10]
        LDRH     R2,[R4, #+6]
        LDRH     R1,[R4, #+4]
        MOVS     R0,R7
        BL       TI2_Config
        LDRH     R1,[R4, #+8]
        MOVS     R0,R7
        BL       TIM_SetIC2Prescaler
        LDRB     R3,[R4, #+10]
        UXTB     R6,R6            ;; ZeroExtS R6,R6,#+24,#+24
        MOVS     R2,R6
        UXTH     R2,R2            ;; ZeroExtS R2,R2,#+16,#+16
        UXTB     R5,R5            ;; ZeroExtS R5,R5,#+24,#+24
        MOVS     R1,R5
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        MOVS     R0,R7
        BL       TI1_Config
        LDRH     R1,[R4, #+8]
        MOVS     R0,R7
        BL       TIM_SetIC1Prescaler
??PWMI_Config_5:
        ADD      SP,SP,#+4
        POP      {R4-R7,PC}       ;; return

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TI1_Config:
        PUSH     {R4-R7}
        MOVS     R6,#+0
        MOVS     R4,R6
        MOVS     R6,#+0
        MOVS     R5,R6
        LDRH     R6,[R0, #+24]
        MOVS     R4,R6
        LDRH     R6,[R0, #+32]
        MOVS     R5,R6
        LDRH     R6,[R0, #+32]
        LDR.N    R7,??TI1_Config_0  ;; 0x3332
        ANDS     R7,R7,R6
        STRH     R7,[R0, #+32]
        MOVS     R6,R4
        LDR.N    R4,??TI1_Config_0+0x4  ;; 0xff0c
        ANDS     R4,R4,R6
        MOVS     R6,R4
        UXTH     R2,R2            ;; ZeroExtS R2,R2,#+16,#+16
        UXTB     R3,R3            ;; ZeroExtS R3,R3,#+24,#+24
        UXTH     R3,R3            ;; ZeroExtS R3,R3,#+16,#+16
        LSLS     R4,R3,#+4
        UXTH     R4,R4            ;; ZeroExtS R4,R4,#+16,#+16
        ORRS     R4,R4,R2
        ORRS     R4,R4,R6
        MOVS     R6,R5
        LDR.N    R5,??TI1_Config_0+0x8  ;; 0x3330
        ANDS     R5,R5,R6
        MOVS     R6,R5
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        ORRS     R5,R1,#0x1
        ORRS     R5,R5,R6
        MOVS     R6,#+0
        STRH     R6,[R0, #+24]
        MOVS     R6,R4
        STRH     R6,[R0, #+24]
        MOVS     R6,R5
        STRH     R6,[R0, #+32]
        POP      {R4-R7}
        BX       LR               ;; return
        DATA
??TI1_Config_0:
        DC32     0x3332
        DC32     0xff0c
        DC32     0x3330

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TI2_Config:
        PUSH     {R0,R4-R8}
        MOV      R8,R1
        MOVS     R6,#+0
        MOVS     R1,R6
        MOVS     R6,#+0
        MOVS     R4,R6
        MOVS     R6,#+0
        MOVS     R5,R6
        LDRH     R6,[R0, #+24]
        MOVS     R1,R6
        LDRH     R6,[R0, #+32]
        MOVS     R4,R6
        UXTH     R8,R8            ;; ZeroExtS R8,R8,#+16,#+16
        LSLS     R6,R8,#+4
        UXTH     R6,R6            ;; ZeroExtS R6,R6,#+16,#+16
        MOVS     R5,R6
        LDRH     R6,[R0, #+32]
        LDR.N    R7,??TI2_Config_0  ;; 0x3323
        ANDS     R7,R7,R6
        STRH     R7,[R0, #+32]
        MOVS     R6,R1
        LDR.N    R1,??TI2_Config_0+0x4  ;; 0xcff
        ANDS     R1,R1,R6
        MOVS     R6,R1
        UXTB     R3,R3            ;; ZeroExtS R3,R3,#+24,#+24
        UXTH     R3,R3            ;; ZeroExtS R3,R3,#+16,#+16
        LSLS     R1,R3,#+12
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        ORRS     R1,R1,R6
        MOVS     R6,R1
        UXTH     R2,R2            ;; ZeroExtS R2,R2,#+16,#+16
        LSLS     R1,R2,#+8
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        ORRS     R1,R1,R6
        MOVS     R6,R4
        LDR.N    R4,??TI2_Config_0+0x8  ;; 0x3303
        ANDS     R4,R4,R6
        MOVS     R6,R4
        ORRS     R4,R5,#0x10
        ORRS     R4,R4,R6
        MOVS     R6,R1
        STRH     R6,[R0, #+24]
        MOVS     R6,R4
        STRH     R6,[R0, #+32]
        ADD      SP,SP,#+4
        POP      {R4-R8}
        BX       LR               ;; return
        DATA
??TI2_Config_0:
        DC32     0x3323
        DC32     0xcff
        DC32     0x3303

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TI3_Config:
        PUSH     {R0,R4-R8}
        MOV      R8,R1
        MOVS     R6,#+0
        MOVS     R1,R6
        MOVS     R6,#+0
        MOVS     R4,R6
        MOVS     R6,#+0
        MOVS     R5,R6
        LDRH     R6,[R0, #+28]
        MOVS     R1,R6
        LDRH     R6,[R0, #+32]
        MOVS     R4,R6
        UXTH     R8,R8            ;; ZeroExtS R8,R8,#+16,#+16
        LSLS     R6,R8,#+8
        UXTH     R6,R6            ;; ZeroExtS R6,R6,#+16,#+16
        MOVS     R5,R6
        LDRH     R6,[R0, #+32]
        LDR.N    R7,??TI3_Config_0  ;; 0x3233
        ANDS     R7,R7,R6
        STRH     R7,[R0, #+32]
        MOVS     R6,R1
        LDR.N    R1,??TI3_Config_0+0x4  ;; 0xff0c
        ANDS     R1,R1,R6
        MOVS     R6,R1
        UXTH     R2,R2            ;; ZeroExtS R2,R2,#+16,#+16
        UXTB     R3,R3            ;; ZeroExtS R3,R3,#+24,#+24
        UXTH     R3,R3            ;; ZeroExtS R3,R3,#+16,#+16
        LSLS     R1,R3,#+4
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        ORRS     R1,R1,R2
        ORRS     R1,R1,R6
        MOVS     R6,R4
        LDR.N    R4,??TI3_Config_0+0x8  ;; 0x3033
        ANDS     R4,R4,R6
        MOVS     R6,R4
        ORRS     R4,R5,#0x100
        ORRS     R4,R4,R6
        MOVS     R6,R1
        STRH     R6,[R0, #+28]
        MOVS     R6,R4
        STRH     R6,[R0, #+32]
        ADD      SP,SP,#+4
        POP      {R4-R8}
        BX       LR               ;; return
        Nop      
        DATA
??TI3_Config_0:
        DC32     0x3233
        DC32     0xff0c
        DC32     0x3033

        SECTION `.XML`:CODE:NOROOT(2)
        THUMB
TI4_Config:
        PUSH     {R0,R4-R8}
        MOV      R8,R1
        MOVS     R6,#+0
        MOVS     R1,R6
        MOVS     R6,#+0
        MOVS     R4,R6
        MOVS     R6,#+0
        MOVS     R5,R6
        LDRH     R6,[R0, #+28]
        MOVS     R1,R6
        LDRH     R6,[R0, #+32]
        MOVS     R4,R6
        UXTH     R8,R8            ;; ZeroExtS R8,R8,#+16,#+16
        LSLS     R6,R8,#+12
        UXTH     R6,R6            ;; ZeroExtS R6,R6,#+16,#+16
        MOVS     R5,R6
        LDRH     R6,[R0, #+32]
        LDR.N    R7,??TI4_Config_0  ;; 0x2333
        ANDS     R7,R7,R6
        STRH     R7,[R0, #+32]
        MOVS     R6,R1
        LDR.N    R1,??TI4_Config_0+0x4  ;; 0xcff
        ANDS     R1,R1,R6
        MOVS     R7,R1
        UXTH     R2,R2            ;; ZeroExtS R2,R2,#+16,#+16
        LSLS     R6,R2,#+8
        UXTH     R6,R6            ;; ZeroExtS R6,R6,#+16,#+16
        UXTB     R3,R3            ;; ZeroExtS R3,R3,#+24,#+24
        UXTH     R3,R3            ;; ZeroExtS R3,R3,#+16,#+16
        LSLS     R1,R3,#+12
        UXTH     R1,R1            ;; ZeroExtS R1,R1,#+16,#+16
        ORRS     R1,R1,R6
        ORRS     R1,R1,R7
        MOVS     R6,R4
        LDR.N    R4,??TI4_Config_0+0x8  ;; 0x333
        ANDS     R4,R4,R6
        MOVS     R6,R4
        ORRS     R4,R5,#0x1000
        ORRS     R4,R4,R6
        MOVS     R6,R1
        STRH     R6,[R0, #+28]
        MOVS     R6,R4
        STRH     R6,[R0, #+32]
        ADD      SP,SP,#+4
        POP      {R4-R8}
        BX       LR               ;; return
        Nop      
        DATA
??TI4_Config_0:
        DC32     0x2333
        DC32     0xcff
        DC32     0x333

        END
// 
// 2 998 bytes in section .XML
//    16 bytes in section .rodata
// 
// 2 998 bytes of CODE  memory
//    16 bytes of CONST memory
//
//Errors: none
//Warnings: none
上一页 1 2 34
💿 文件大小 1395 K
👤 上传用户 yeling023
📂 所属分类微处理器开发
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