📄 stm32f10x_tim.s
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UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
MOVS R3,R2
ORRS R3,R3,R1
ORRS R3,R3,R4
MOVS R4,R3
STRH R4,[R0, #+72]
ADD SP,SP,#+4
POP {R4}
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_DMACmd:
PUSH {R0,R4}
MOVS R4,#+0
MOVS R3,R4
LDRH R4,[R0, #+12]
MOVS R3,R4
UXTB R2,R2 ;; ZeroExtS R2,R2,#+24,#+24
CMP R2,#+0
BEQ.N ??TIM_DMACmd_0
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
ORRS R3,R3,R1
B.N ??TIM_DMACmd_1
??TIM_DMACmd_0:
MOVS R4,R3
MVNS R3,R1
UXTH R3,R3 ;; ZeroExtS R3,R3,#+16,#+16
ANDS R3,R3,R4
??TIM_DMACmd_1:
MOVS R4,R3
STRH R4,[R0, #+12]
ADD SP,SP,#+4
POP {R4}
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_InternalClockConfig:
LDRH R1,[R0, #+8]
LDR.N R2,??DataTable5 ;; 0xfff0
ANDS R2,R2,R1
STRH R2,[R0, #+8]
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ITRxExternalClockConfig:
PUSH {R0,R4,R5,LR}
MOVS R4,R0
MOVS R5,R1
MOVS R1,R5
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
MOVS R0,R4
BL TIM_SelectInputTrigger
LDRH R0,[R4, #+8]
ORRS R0,R0,#0x7
STRH R0,[R4, #+8]
ADD SP,SP,#+4
POP {R4,R5,PC} ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_TIxExternalClockConfig:
PUSH {R0,R4-R7,LR}
MOVS R4,R0
MOVS R5,R1
MOVS R6,R2
MOVS R7,R3
UXTH R5,R5 ;; ZeroExtS R5,R5,#+16,#+16
CMP R5,#+96
BNE.N ??TIM_TIxExternalClockConfig_0
MOVS R3,R7
UXTB R3,R3 ;; ZeroExtS R3,R3,#+24,#+24
MOVS R2,#+1
MOVS R1,R6
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
MOVS R0,R4
BL TI2_Config
B.N ??TIM_TIxExternalClockConfig_1
??TIM_TIxExternalClockConfig_0:
MOVS R3,R7
UXTB R3,R3 ;; ZeroExtS R3,R3,#+24,#+24
MOVS R2,#+1
MOVS R1,R6
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
MOVS R0,R4
BL TI1_Config
??TIM_TIxExternalClockConfig_1:
MOVS R1,R5
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
MOVS R0,R4
BL TIM_SelectInputTrigger
LDRH R0,[R4, #+8]
ORRS R0,R0,#0x7
STRH R0,[R4, #+8]
ADD SP,SP,#+4
POP {R4-R7,PC} ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ETRClockMode1Config:
PUSH {R0,R4-R7,LR}
MOVS R4,R0
MOVS R5,R1
MOVS R6,R2
MOVS R7,R3
MOVS R3,R7
UXTB R3,R3 ;; ZeroExtS R3,R3,#+24,#+24
MOVS R2,R6
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
MOVS R1,R5
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
MOVS R0,R4
BL TIM_ETRConfig
LDRH R0,[R4, #+8]
LDR.N R1,??DataTable5 ;; 0xfff0
ANDS R1,R1,R0
STRH R1,[R4, #+8]
LDRH R0,[R4, #+8]
ORRS R0,R0,#0x7
STRH R0,[R4, #+8]
LDRH R0,[R4, #+8]
LDR.N R1,??DataTable6 ;; 0xff87
ANDS R1,R1,R0
STRH R1,[R4, #+8]
LDRH R0,[R4, #+8]
ORRS R0,R0,#0x70
STRH R0,[R4, #+8]
ADD SP,SP,#+4
POP {R4-R7,PC} ;; return
SECTION `.XML`:CODE:NOROOT(2)
DATA
??DataTable5:
DC32 0xfff0
SECTION `.XML`:CODE:NOROOT(2)
DATA
??DataTable6:
DC32 0xff87
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ETRClockMode2Config:
PUSH {R0,R4-R7,LR}
MOVS R4,R0
MOVS R5,R1
MOVS R6,R2
MOVS R7,R3
MOVS R3,R7
UXTB R3,R3 ;; ZeroExtS R3,R3,#+24,#+24
MOVS R2,R6
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
MOVS R1,R5
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
MOVS R0,R4
BL TIM_ETRConfig
LDRH R0,[R4, #+8]
ORRS R0,R0,#0x4000
STRH R0,[R4, #+8]
ADD SP,SP,#+4
POP {R4-R7,PC} ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ETRConfig:
PUSH {R0,R4-R6}
MOVS R5,#+0
MOVS R4,R5
LDRH R5,[R0, #+8]
MOVS R4,R5
ANDS R4,R4,#0xF7
MOVS R6,R4
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
MOVS R5,R2
ORRS R5,R5,R1
UXTB R3,R3 ;; ZeroExtS R3,R3,#+24,#+24
UXTH R3,R3 ;; ZeroExtS R3,R3,#+16,#+16
LSLS R4,R3,#+8
UXTH R4,R4 ;; ZeroExtS R4,R4,#+16,#+16
ORRS R4,R4,R5
ORRS R4,R4,R6
MOVS R5,R4
STRH R5,[R0, #+8]
ADD SP,SP,#+4
POP {R4-R6}
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_SelectInputTrigger:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+8]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_SelectInputTrigger_0 ;; 0xff87
ANDS R2,R2,R3
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
ORRS R2,R2,R1
MOVS R3,R2
STRH R3,[R0, #+8]
BX LR ;; return
DATA
??TIM_SelectInputTrigger_0:
DC32 0xff87
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_PrescalerConfig:
PUSH {R0,R4}
STRH R1,[R0, #+40]
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
CMP R2,#+1
BNE.N ??TIM_PrescalerConfig_0
LDRH R3,[R0, #+20]
ORRS R3,R3,#0x1
STRH R3,[R0, #+20]
B.N ??TIM_PrescalerConfig_1
??TIM_PrescalerConfig_0:
LDRH R3,[R0, #+20]
MOVS R4,#+1
ANDS R4,R4,R3
STRH R4,[R0, #+20]
??TIM_PrescalerConfig_1:
ADD SP,SP,#+4
POP {R4}
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_CounterModeConfig:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+0]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_CounterModeConfig_0 ;; 0x38f
ANDS R2,R2,R3
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
ORRS R2,R2,R1
MOVS R3,R2
STRH R3,[R0, #+0]
BX LR ;; return
DATA
??TIM_CounterModeConfig_0:
DC32 0x38f
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ForcedOC1Config:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+24]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_ForcedOC1Config_0 ;; 0xff8f
ANDS R2,R2,R3
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
ORRS R2,R2,R1
MOVS R3,R2
STRH R3,[R0, #+24]
BX LR ;; return
DATA
??TIM_ForcedOC1Config_0:
DC32 0xff8f
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ForcedOC2Config:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+24]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_ForcedOC2Config_0 ;; 0x8fff
ANDS R2,R2,R3
MOVS R3,R2
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
LSLS R2,R1,#+8
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
ORRS R2,R2,R3
MOVS R3,R2
STRH R3,[R0, #+24]
BX LR ;; return
Nop
DATA
??TIM_ForcedOC2Config_0:
DC32 0x8fff
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ForcedOC3Config:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+28]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_ForcedOC3Config_0 ;; 0xff8f
ANDS R2,R2,R3
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
ORRS R2,R2,R1
MOVS R3,R2
STRH R3,[R0, #+28]
BX LR ;; return
DATA
??TIM_ForcedOC3Config_0:
DC32 0xff8f
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ForcedOC4Config:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+28]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_ForcedOC4Config_0 ;; 0x8fff
ANDS R2,R2,R3
MOVS R3,R2
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
LSLS R2,R1,#+8
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
ORRS R2,R2,R3
MOVS R3,R2
STRH R3,[R0, #+28]
BX LR ;; return
Nop
DATA
??TIM_ForcedOC4Config_0:
DC32 0x8fff
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ARRPreloadConfig:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+0]
MOVS R2,R3
UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
CMP R1,#+0
BEQ.N ??TIM_ARRPreloadConfig_0
ORRS R2,R2,#0x80
B.N ??TIM_ARRPreloadConfig_1
??TIM_ARRPreloadConfig_0:
MOVS R3,R2
LDR.N R2,??TIM_ARRPreloadConfig_2 ;; 0x37f
ANDS R2,R2,R3
??TIM_ARRPreloadConfig_1:
MOVS R3,R2
STRH R3,[R0, #+0]
BX LR ;; return
DATA
??TIM_ARRPreloadConfig_2:
DC32 0x37f
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_SelectCCDMA:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+4]
MOVS R2,R3
UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
CMP R1,#+0
BEQ.N ??TIM_SelectCCDMA_0
ORRS R2,R2,#0x8
B.N ??TIM_SelectCCDMA_1
??TIM_SelectCCDMA_0:
ANDS R2,R2,#0xF0
??TIM_SelectCCDMA_1:
MOVS R3,R2
STRH R3,[R0, #+4]
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_OC1PreloadConfig:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+24]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_OC1PreloadConfig_0 ;; 0xfff7
ANDS R2,R2,R3
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
ORRS R2,R2,R1
MOVS R3,R2
STRH R3,[R0, #+24]
BX LR ;; return
DATA
??TIM_OC1PreloadConfig_0:
DC32 0xfff7
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_OC2PreloadConfig:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+24]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_OC2PreloadConfig_0 ;; 0xf7ff
ANDS R2,R2,R3
MOVS R3,R2
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
LSLS R2,R1,#+8
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
ORRS R2,R2,R3
MOVS R3,R2
STRH R3,[R0, #+24]
BX LR ;; return
Nop
DATA
??TIM_OC2PreloadConfig_0:
DC32 0xf7ff
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_OC3PreloadConfig:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+28]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_OC3PreloadConfig_0 ;; 0xfff7
ANDS R2,R2,R3
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
ORRS R2,R2,R1
MOVS R3,R2
STRH R3,[R0, #+28]
BX LR ;; return
DATA
??TIM_OC3PreloadConfig_0:
DC32 0xfff7
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_OC4PreloadConfig:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+28]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_OC4PreloadConfig_0 ;; 0xf7ff
ANDS R2,R2,R3
MOVS R3,R2
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
LSLS R2,R1,#+8
UXTH R2,R2 ;; ZeroExtS R2,R2,#+16,#+16
ORRS R2,R2,R3
MOVS R3,R2
STRH R3,[R0, #+28]
BX LR ;; return
Nop
DATA
??TIM_OC4PreloadConfig_0:
DC32 0xf7ff
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_OC1FastConfig:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+24]
MOVS R2,R3
MOVS R3,R2
LDR.N R2,??TIM_OC1FastConfig_0 ;; 0xfffb
ANDS R2,R2,R3
UXTH R1,R1 ;; ZeroExtS R1,R1,#+16,#+16
ORRS R2,R2,R1
MOVS R3,R2
STRH R3,[R0, #+24]
BX LR ;; return
DATA
??TIM_OC1FastConfig_0:
DC32 0xfffb
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_OC2FastConfig:
MOVS R3,#+0
MOVS R2,R3
LDRH R3,[R0, #+24]
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