📄 stm32f10x_tim.s
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///////////////////////////////////////////////////////////////////////////////
// /
// 30/Jul/2008 14:37:40 /
// IAR ARM ANSI C/C++ Compiler V5.11.0.20622/W32 EVALUATION /
// Copyright 1999-2007 IAR Systems. All rights reserved. /
// /
// Cpu mode = thumb /
// Endian = little /
// Source file = E:\library\src\stm32f10x_tim.c /
// Command line = E:\library\src\stm32f10x_tim.c -D EMB_FLASH -lCN /
// E:\ELE\yten\pro\Debug\List\ -lb /
// E:\ELE\yten\pro\Debug\List\ -o /
// E:\ELE\yten\pro\Debug\Obj\ --no_cse --no_unroll /
// --no_inline --no_code_motion --no_tbaa --no_clustering /
// --no_scheduling --debug --endian little --cpu /
// Cortex-M3 -e --fpu None --dlib_config "C:\Program /
// Files\IAR Systems\Embedded Workbench 5.0 /
// Evaluation\ARM\INC\DLib_Config_Normal.h" -I /
// E:\ELE\yten\pro\ -I E:\ELE\yten\pro\..\LIBRARY\INC\ -I /
// "C:\Program Files\IAR Systems\Embedded Workbench 5.0 /
// Evaluation\ARM\INC\" --section .text=.XML -On /
// List file = E:\ELE\yten\pro\Debug\List\stm32f10x_tim.s /
// /
// /
///////////////////////////////////////////////////////////////////////////////
NAME stm32f10x_tim
EXTERN RCC_APB1PeriphResetCmd
PUBLIC TIM_ARRPreloadConfig
PUBLIC TIM_ClearFlag
PUBLIC TIM_ClearITPendingBit
PUBLIC TIM_ClearOC1Ref
PUBLIC TIM_ClearOC2Ref
PUBLIC TIM_ClearOC3Ref
PUBLIC TIM_ClearOC4Ref
PUBLIC TIM_Cmd
PUBLIC TIM_CounterModeConfig
PUBLIC TIM_DMACmd
PUBLIC TIM_DMAConfig
PUBLIC TIM_DeInit
PUBLIC TIM_ETRClockMode1Config
PUBLIC TIM_ETRClockMode2Config
PUBLIC TIM_ETRConfig
PUBLIC TIM_EncoderInterfaceConfig
PUBLIC TIM_ForcedOC1Config
PUBLIC TIM_ForcedOC2Config
PUBLIC TIM_ForcedOC3Config
PUBLIC TIM_ForcedOC4Config
PUBLIC TIM_GenerateEvent
PUBLIC TIM_GetCapture1
PUBLIC TIM_GetCapture2
PUBLIC TIM_GetCapture3
PUBLIC TIM_GetCapture4
PUBLIC TIM_GetCounter
PUBLIC TIM_GetFlagStatus
PUBLIC TIM_GetITStatus
PUBLIC TIM_GetPrescaler
PUBLIC TIM_ICInit
PUBLIC TIM_ICStructInit
PUBLIC TIM_ITConfig
PUBLIC TIM_ITRxExternalClockConfig
PUBLIC TIM_InternalClockConfig
PUBLIC TIM_OC1FastConfig
PUBLIC TIM_OC1PolarityConfig
PUBLIC TIM_OC1PreloadConfig
PUBLIC TIM_OC2FastConfig
PUBLIC TIM_OC2PolarityConfig
PUBLIC TIM_OC2PreloadConfig
PUBLIC TIM_OC3FastConfig
PUBLIC TIM_OC3PolarityConfig
PUBLIC TIM_OC3PreloadConfig
PUBLIC TIM_OC4FastConfig
PUBLIC TIM_OC4PolarityConfig
PUBLIC TIM_OC4PreloadConfig
PUBLIC TIM_OCInit
PUBLIC TIM_OCStructInit
PUBLIC TIM_PrescalerConfig
PUBLIC TIM_SelectCCDMA
PUBLIC TIM_SelectHallSensor
PUBLIC TIM_SelectInputTrigger
PUBLIC TIM_SelectMasterSlaveMode
PUBLIC TIM_SelectOnePulseMode
PUBLIC TIM_SelectOutputTrigger
PUBLIC TIM_SelectSlaveMode
PUBLIC TIM_SetAutoreload
PUBLIC TIM_SetClockDivision
PUBLIC TIM_SetCompare1
PUBLIC TIM_SetCompare2
PUBLIC TIM_SetCompare3
PUBLIC TIM_SetCompare4
PUBLIC TIM_SetCounter
PUBLIC TIM_SetIC1Prescaler
PUBLIC TIM_SetIC2Prescaler
PUBLIC TIM_SetIC3Prescaler
PUBLIC TIM_SetIC4Prescaler
PUBLIC TIM_TIxExternalClockConfig
PUBLIC TIM_TimeBaseInit
PUBLIC TIM_TimeBaseStructInit
PUBLIC TIM_UpdateDisableConfig
PUBLIC TIM_UpdateRequestConfig
SECTION `.rodata`:CONST:NOROOT(2)
Tab_OCModeMask:
DATA
DC16 65280, 255, 65280, 255
SECTION `.rodata`:CONST:NOROOT(2)
Tab_PolarityMask:
DATA
DC16 13105, 13075, 12595, 4915
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_DeInit:
PUSH {R4,LR}
MOVS R4,R0
MOVS R0,R4
MOVS R1,#+1073741824
SUBS R0,R0,R1
BEQ.N ??TIM_DeInit_0
MOVS R1,#+1024
SUBS R0,R0,R1
BEQ.N ??TIM_DeInit_1
MOVS R1,#+1024
SUBS R0,R0,R1
BEQ.N ??TIM_DeInit_2
B.N ??TIM_DeInit_3
??TIM_DeInit_0:
MOVS R1,#+1
MOVS R0,#+1
BL RCC_APB1PeriphResetCmd
MOVS R1,#+0
MOVS R0,#+1
BL RCC_APB1PeriphResetCmd
B.N ??TIM_DeInit_3
??TIM_DeInit_1:
MOVS R1,#+1
MOVS R0,#+2
BL RCC_APB1PeriphResetCmd
MOVS R1,#+0
MOVS R0,#+2
BL RCC_APB1PeriphResetCmd
B.N ??TIM_DeInit_3
??TIM_DeInit_2:
MOVS R1,#+1
MOVS R0,#+4
BL RCC_APB1PeriphResetCmd
MOVS R1,#+0
MOVS R0,#+4
BL RCC_APB1PeriphResetCmd
??TIM_DeInit_3:
POP {R4,PC} ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_TimeBaseInit:
PUSH {R0,R4}
LDRH R2,[R1, #+0]
STRH R2,[R0, #+44]
LDRH R2,[R1, #+2]
STRH R2,[R0, #+40]
LDRH R2,[R0, #+0]
ANDS R2,R2,#0x8F
STRH R2,[R0, #+0]
LDRH R2,[R0, #+0]
LDRH R3,[R1, #+4]
LDRH R4,[R1, #+6]
ORRS R4,R4,R3
ORRS R4,R4,R2
STRH R4,[R0, #+0]
ADD SP,SP,#+4
POP {R4}
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_OCInit:
PUSH {R4,R5}
MOVS R4,#+0
MOVS R2,R4
MOVS R4,#+0
MOVS R3,R4
LDRH R4,[R0, #+32]
MOVS R3,R4
LDRH R4,[R1, #+2]
CMP R4,#+0
BEQ.N ??TIM_OCInit_0
LDRH R4,[R1, #+2]
CMP R4,#+1
BNE.N ??TIM_OCInit_1
??TIM_OCInit_0:
LDRH R4,[R0, #+24]
MOVS R2,R4
MOVS R5,R2
LDRH R2,[R1, #+2]
MOVS R4,#+2
MULS R2,R4,R2
LDR.N R4,??TIM_OCInit_2 ;; Tab_OCModeMask
LDRH R2,[R4, R2]
ANDS R2,R2,R5
MOVS R5,R3
LDRH R3,[R1, #+2]
MOVS R4,#+2
MULS R3,R4,R3
LDR.N R4,??TIM_OCInit_2+0x4 ;; Tab_PolarityMask
LDRH R3,[R4, R3]
ANDS R3,R3,R5
LDRH R4,[R1, #+2]
CMP R4,#+0
BNE.N ??TIM_OCInit_3
LDRH R4,[R0, #+32]
LDR.N R5,??DataTable0 ;; 0x3332
ANDS R5,R5,R4
STRH R5,[R0, #+32]
MOVS R4,R2
LDRH R2,[R1, #+0]
ORRS R2,R2,R4
LDRH R4,[R1, #+4]
STRH R4,[R0, #+52]
ORRS R3,R3,#0x1
MOVS R4,R3
LDRH R3,[R1, #+6]
ORRS R3,R3,R4
B.N ??TIM_OCInit_4
??TIM_OCInit_3:
LDRH R4,[R0, #+32]
LDR.N R5,??DataTable1 ;; 0x3323
ANDS R5,R5,R4
STRH R5,[R0, #+32]
LDRH R4,[R1, #+0]
ORRS R2,R2,R4, LSL #+8
LDRH R4,[R1, #+4]
STRH R4,[R0, #+56]
ORRS R3,R3,#0x10
LDRH R4,[R1, #+6]
ORRS R3,R3,R4, LSL #+4
??TIM_OCInit_4:
MOVS R4,R2
STRH R4,[R0, #+24]
B.N ??TIM_OCInit_5
??TIM_OCInit_1:
LDRH R4,[R1, #+2]
CMP R4,#+2
BEQ.N ??TIM_OCInit_6
LDRH R4,[R1, #+2]
CMP R4,#+3
BNE.N ??TIM_OCInit_5
??TIM_OCInit_6:
LDRH R4,[R0, #+28]
MOVS R2,R4
MOVS R5,R2
LDRH R2,[R1, #+2]
MOVS R4,#+2
MULS R2,R4,R2
LDR.N R4,??TIM_OCInit_2 ;; Tab_OCModeMask
LDRH R2,[R4, R2]
ANDS R2,R2,R5
MOVS R5,R3
LDRH R3,[R1, #+2]
MOVS R4,#+2
MULS R3,R4,R3
LDR.N R4,??TIM_OCInit_2+0x4 ;; Tab_PolarityMask
LDRH R3,[R4, R3]
ANDS R3,R3,R5
LDRH R4,[R1, #+2]
CMP R4,#+2
BNE.N ??TIM_OCInit_7
LDRH R4,[R0, #+32]
LDR.N R5,??DataTable2 ;; 0x3233
ANDS R5,R5,R4
STRH R5,[R0, #+32]
MOVS R4,R2
LDRH R2,[R1, #+0]
ORRS R2,R2,R4
LDRH R4,[R1, #+4]
STRH R4,[R0, #+60]
ORRS R3,R3,#0x100
LDRH R4,[R1, #+6]
ORRS R3,R3,R4, LSL #+8
B.N ??TIM_OCInit_8
??TIM_OCInit_7:
LDRH R4,[R0, #+32]
LDR.N R5,??DataTable3 ;; 0x2333
ANDS R5,R5,R4
STRH R5,[R0, #+32]
LDRH R4,[R1, #+0]
ORRS R2,R2,R4, LSL #+8
LDRH R4,[R1, #+4]
STRH R4,[R0, #+64]
ORRS R3,R3,#0x1000
LDRH R4,[R1, #+6]
ORRS R3,R3,R4, LSL #+12
??TIM_OCInit_8:
MOVS R4,R2
STRH R4,[R0, #+28]
??TIM_OCInit_5:
MOVS R4,R3
STRH R4,[R0, #+32]
POP {R4,R5}
BX LR ;; return
Nop
DATA
??TIM_OCInit_2:
DC32 Tab_OCModeMask
DC32 Tab_PolarityMask
SECTION `.XML`:CODE:NOROOT(2)
DATA
??DataTable0:
DC32 0x3332
SECTION `.XML`:CODE:NOROOT(2)
DATA
??DataTable1:
DC32 0x3323
SECTION `.XML`:CODE:NOROOT(2)
DATA
??DataTable2:
DC32 0x3233
SECTION `.XML`:CODE:NOROOT(2)
DATA
??DataTable3:
DC32 0x2333
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ICInit:
PUSH {R0,R4,R5,LR}
MOVS R4,R0
MOVS R5,R1
LDRH R0,[R5, #+0]
CMP R0,#+7
BNE.N ??TIM_ICInit_0
LDRH R0,[R5, #+2]
CMP R0,#+0
BNE.N ??TIM_ICInit_1
LDRB R3,[R5, #+10]
LDRH R2,[R5, #+6]
LDRH R1,[R5, #+4]
MOVS R0,R4
BL TI1_Config
LDRH R1,[R5, #+8]
MOVS R0,R4
BL TIM_SetIC1Prescaler
B.N ??TIM_ICInit_2
??TIM_ICInit_1:
LDRH R0,[R5, #+2]
CMP R0,#+1
BNE.N ??TIM_ICInit_3
LDRB R3,[R5, #+10]
LDRH R2,[R5, #+6]
LDRH R1,[R5, #+4]
MOVS R0,R4
BL TI2_Config
LDRH R1,[R5, #+8]
MOVS R0,R4
BL TIM_SetIC2Prescaler
B.N ??TIM_ICInit_2
??TIM_ICInit_3:
LDRH R0,[R5, #+2]
CMP R0,#+2
BNE.N ??TIM_ICInit_4
LDRB R3,[R5, #+10]
LDRH R2,[R5, #+6]
LDRH R1,[R5, #+4]
MOVS R0,R4
BL TI3_Config
LDRH R1,[R5, #+8]
MOVS R0,R4
BL TIM_SetIC3Prescaler
B.N ??TIM_ICInit_2
??TIM_ICInit_4:
LDRB R3,[R5, #+10]
LDRH R2,[R5, #+6]
LDRH R1,[R5, #+4]
MOVS R0,R4
BL TI4_Config
LDRH R1,[R5, #+8]
MOVS R0,R4
BL TIM_SetIC4Prescaler
B.N ??TIM_ICInit_2
??TIM_ICInit_0:
MOVS R1,R5
MOVS R0,R4
BL PWMI_Config
??TIM_ICInit_2:
ADD SP,SP,#+4
POP {R4,R5,PC} ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_TimeBaseStructInit:
MOVS R1,#+0
STRH R1,[R0, #+0]
MOVS R1,#+0
STRH R1,[R0, #+2]
MOVS R1,#+0
STRH R1,[R0, #+4]
MOVS R1,#+0
STRH R1,[R0, #+6]
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_OCStructInit:
MOVS R1,#+0
STRH R1,[R0, #+0]
MOVS R1,#+0
STRH R1,[R0, #+2]
MOVS R1,#+0
STRH R1,[R0, #+4]
MOVS R1,#+0
STRH R1,[R0, #+6]
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ICStructInit:
MOVS R1,#+7
STRH R1,[R0, #+0]
MOVS R1,#+0
STRH R1,[R0, #+2]
MOVS R1,#+0
STRH R1,[R0, #+4]
MOVS R1,#+1
STRH R1,[R0, #+6]
MOVS R1,#+0
STRH R1,[R0, #+8]
MOVS R1,#+0
STRB R1,[R0, #+10]
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_Cmd:
UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
CMP R1,#+0
BEQ.N ??TIM_Cmd_0
LDRH R2,[R0, #+0]
ORRS R2,R2,#0x1
STRH R2,[R0, #+0]
B.N ??TIM_Cmd_1
??TIM_Cmd_0:
LDRH R2,[R0, #+0]
LDR.N R3,??TIM_Cmd_2 ;; 0x3fe
ANDS R3,R3,R2
STRH R3,[R0, #+0]
??TIM_Cmd_1:
BX LR ;; return
Nop
DATA
??TIM_Cmd_2:
DC32 0x3fe
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_ITConfig:
UXTB R2,R2 ;; ZeroExtS R2,R2,#+24,#+24
CMP R2,#+0
BEQ.N ??TIM_ITConfig_0
LDRH R3,[R0, #+12]
ORRS R3,R3,R1
STRH R3,[R0, #+12]
B.N ??TIM_ITConfig_1
??TIM_ITConfig_0:
LDRH R3,[R0, #+12]
BICS R3,R3,R1
STRH R3,[R0, #+12]
??TIM_ITConfig_1:
BX LR ;; return
SECTION `.XML`:CODE:NOROOT(2)
THUMB
TIM_DMAConfig:
PUSH {R0,R4}
MOVS R4,#+0
MOVS R3,R4
LDRH R4,[R0, #+72]
MOVS R3,R4
MOVS R4,#+0
MOVS R3,R4
MOVS R4,R3
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