📄 stm32f10x_adc.lst
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\ 0000003A C560 STR R5,[R0, #+12]
\ 0000003C 0FE0 B.N ??ADC_RegularChannelConfig_1
582 }
583 else /* ADC_Channel include in ADC_Channel_[0..9] */
584 {
585 /* Get the old register value */
586 tmpreg1 = ADCx->SMPR2;
\ ??ADC_RegularChannelConfig_0:
\ 0000003E 0669 LDR R6,[R0, #+16]
\ 00000040 3500 MOVS R5,R6
587 /* Calculate the mask to clear */
588 tmpreg2 = (u32)SMPR2_SMP_Set << (3 * ADC_Channel);
\ 00000042 0726 MOVS R6,#+7
\ 00000044 0327 MOVS R7,#+3
\ 00000046 4F43 MULS R7,R1,R7
\ 00000048 BE40 LSLS R6,R6,R7
\ 0000004A 3400 MOVS R4,R6
589 /* Clear the old discontinuous mode channel count */
590 tmpreg1 &= ~tmpreg2;
\ 0000004C A543 BICS R5,R5,R4
591 /* Calculate the mask to set */
592 tmpreg2 = (u32)ADC_SampleTime << (3 * ADC_Channel);
\ 0000004E DBB2 UXTB R3,R3 ;; ZeroExtS R3,R3,#+24,#+24
\ 00000050 0326 MOVS R6,#+3
\ 00000052 4E43 MULS R6,R1,R6
\ 00000054 13FA06F6 LSLS R6,R3,R6
\ 00000058 3400 MOVS R4,R6
593 /* Set the discontinuous mode channel count */
594 tmpreg1 |= tmpreg2;
\ 0000005A 2543 ORRS R5,R5,R4
595 /* Store the new register value */
596 ADCx->SMPR2 = tmpreg1;
\ 0000005C 0561 STR R5,[R0, #+16]
597 }
598 /* For Rank 1 to 6 */
599 if (Rank < 7)
\ ??ADC_RegularChannelConfig_1:
\ 0000005E D2B2 UXTB R2,R2 ;; ZeroExtS R2,R2,#+24,#+24
\ 00000060 072A CMP R2,#+7
\ 00000062 14D2 BCS.N ??ADC_RegularChannelConfig_2
600 {
601 /* Get the old register value */
602 tmpreg1 = ADCx->SQR3;
\ 00000064 466B LDR R6,[R0, #+52]
\ 00000066 3500 MOVS R5,R6
603 /* Calculate the mask to clear */
604 tmpreg2 = (u32)SQR3_SQ_Set << (5 * (Rank - 1));
\ 00000068 1F26 MOVS R6,#+31
\ 0000006A B446 MOV R12,R6
\ 0000006C 571E SUBS R7,R2,#+1
\ 0000006E 0526 MOVS R6,#+5
\ 00000070 7743 MULS R7,R6,R7
\ 00000072 6646 MOV R6,R12
\ 00000074 BE40 LSLS R6,R6,R7
\ 00000076 3400 MOVS R4,R6
605 /* Clear the old SQx bits for the selected rank */
606 tmpreg1 &= ~tmpreg2;
\ 00000078 A543 BICS R5,R5,R4
607 /* Calculate the mask to set */
608 tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 1));
\ 0000007A C9B2 UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
\ 0000007C 561E SUBS R6,R2,#+1
\ 0000007E 0527 MOVS R7,#+5
\ 00000080 7E43 MULS R6,R7,R6
\ 00000082 11FA06F6 LSLS R6,R1,R6
\ 00000086 3400 MOVS R4,R6
609 /* Set the SQx bits for the selected rank */
610 tmpreg1 |= tmpreg2;
\ 00000088 2543 ORRS R5,R5,R4
611 /* Store the new register value */
612 ADCx->SQR3 = tmpreg1;
\ 0000008A 4563 STR R5,[R0, #+52]
\ 0000008C 2DE0 B.N ??ADC_RegularChannelConfig_3
613 }
614 /* For Rank 7 to 12 */
615 else if (Rank < 13)
\ ??ADC_RegularChannelConfig_2:
\ 0000008E D2B2 UXTB R2,R2 ;; ZeroExtS R2,R2,#+24,#+24
\ 00000090 0D2A CMP R2,#+13
\ 00000092 14D2 BCS.N ??ADC_RegularChannelConfig_4
616 {
617 /* Get the old register value */
618 tmpreg1 = ADCx->SQR2;
\ 00000094 066B LDR R6,[R0, #+48]
\ 00000096 3500 MOVS R5,R6
619 /* Calculate the mask to clear */
620 tmpreg2 = (u32)SQR2_SQ_Set << (5 * (Rank - 7));
\ 00000098 1F26 MOVS R6,#+31
\ 0000009A B446 MOV R12,R6
\ 0000009C D71F SUBS R7,R2,#+7
\ 0000009E 0526 MOVS R6,#+5
\ 000000A0 7743 MULS R7,R6,R7
\ 000000A2 6646 MOV R6,R12
\ 000000A4 BE40 LSLS R6,R6,R7
\ 000000A6 3400 MOVS R4,R6
621 /* Clear the old SQx bits for the selected rank */
622 tmpreg1 &= ~tmpreg2;
\ 000000A8 A543 BICS R5,R5,R4
623 /* Calculate the mask to set */
624 tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 7));
\ 000000AA C9B2 UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
\ 000000AC D61F SUBS R6,R2,#+7
\ 000000AE 0527 MOVS R7,#+5
\ 000000B0 7E43 MULS R6,R7,R6
\ 000000B2 11FA06F6 LSLS R6,R1,R6
\ 000000B6 3400 MOVS R4,R6
625 /* Set the SQx bits for the selected rank */
626 tmpreg1 |= tmpreg2;
\ 000000B8 2543 ORRS R5,R5,R4
627 /* Store the new register value */
628 ADCx->SQR2 = tmpreg1;
\ 000000BA 0563 STR R5,[R0, #+48]
\ 000000BC 15E0 B.N ??ADC_RegularChannelConfig_3
629 }
630 /* For Rank 13 to 16 */
631 else
632 {
633 /* Get the old register value */
634 tmpreg1 = ADCx->SQR1;
\ ??ADC_RegularChannelConfig_4:
\ 000000BE C66A LDR R6,[R0, #+44]
\ 000000C0 3500 MOVS R5,R6
635 /* Calculate the mask to clear */
636 tmpreg2 = (u32)SQR1_SQ_Set << (5 * (Rank - 13));
\ 000000C2 1F26 MOVS R6,#+31
\ 000000C4 B446 MOV R12,R6
\ 000000C6 B2F10D07 SUBS R7,R2,#+13
\ 000000CA 0526 MOVS R6,#+5
\ 000000CC 7743 MULS R7,R6,R7
\ 000000CE 6646 MOV R6,R12
\ 000000D0 BE40 LSLS R6,R6,R7
\ 000000D2 3400 MOVS R4,R6
637 /* Clear the old SQx bits for the selected rank */
638 tmpreg1 &= ~tmpreg2;
\ 000000D4 A543 BICS R5,R5,R4
639 /* Calculate the mask to set */
640 tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 13));
\ 000000D6 C9B2 UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
\ 000000D8 B2F10D06 SUBS R6,R2,#+13
\ 000000DC 0527 MOVS R7,#+5
\ 000000DE 7E43 MULS R6,R7,R6
\ 000000E0 11FA06F6 LSLS R6,R1,R6
\ 000000E4 3400 MOVS R4,R6
641 /* Set the SQx bits for the selected rank */
642 tmpreg1 |= tmpreg2;
\ 000000E6 2543 ORRS R5,R5,R4
643 /* Store the new register value */
644 ADCx->SQR1 = tmpreg1;
\ 000000E8 C562 STR R5,[R0, #+44]
645 }
646 }
\ ??ADC_RegularChannelConfig_3:
\ 000000EA F0BC POP {R4-R7}
\ 000000EC 7047 BX LR ;; return
647
648 /*******************************************************************************
649 * Function Name : ADC_ExternalTrigConvCmd
650 * Description : Enables or disables the ADCx conversion through external trigger.
651 * Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
652 * - NewState: new state of the selected ADC external trigger
653 * start of conversion.
654 * This parameter can be: ENABLE or DISABLE.
655 * Output : None
656 * Return : None
657 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
658 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
659 {
660 /* Check the parameters */
661 assert_param(IS_FUNCTIONAL_STATE(NewState));
662
663 if (NewState != DISABLE)
\ ADC_ExternalTrigConvCmd:
\ 00000000 C9B2 UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
\ 00000002 0029 CMP R1,#+0
\ 00000004 04D0 BEQ.N ??ADC_ExternalTrigConvCmd_0
664 {
665 /* Enable the selected ADC conversion on external event */
666 ADCx->CR2 |= CR2_EXTTRIG_Set;
\ 00000006 8268 LDR R2,[R0, #+8]
\ 00000008 52F48012 ORRS R2,R2,#0x100000
\ 0000000C 8260 STR R2,[R0, #+8]
\ 0000000E 04E0 B.N ??ADC_ExternalTrigConvCmd_1
667 }
668 else
669 {
670 /* Disable the selected ADC conversion on external event */
671 ADCx->CR2 &= CR2_EXTTRIG_Reset;
\ ??ADC_ExternalTrigConvCmd_0:
\ 00000010 8268 LDR R2,[R0, #+8]
\ 00000012 7FF48013 MVNS R3,#+1048576
\ 00000016 1340 ANDS R3,R3,R2
\ 00000018 8360 STR R3,[R0, #+8]
672 }
673 }
\ ??ADC_ExternalTrigConvCmd_1:
\ 0000001A 7047 BX LR ;; return
674
675 /*******************************************************************************
676 * Function Name : ADC_GetConversionValue
677 * Description : Returns the last ADCx conversion result data for regular channel.
678 * Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
679 * Output : None
680 * Return : The Data conversion value.
681 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
682 u16 ADC_GetConversionValue(ADC_TypeDef* ADCx)
683 {
684 /* Return the selected ADC conversion value */
685 return (u16) ADCx->DR;
\ ADC_GetConversionValue:
\ 00000000 C06C LDR R0,[R0, #+76]
\ 00000002 80B2 UXTH R0,R0 ;; ZeroExtS R0,R0,#+16,#+16
\ 00000004 7047 BX LR ;; return
686 }
687
688 /*******************************************************************************
689 * Function Name : ADC_GetDualModeConversionValue
690 * Description : Returns the last ADCs conversion result data in dual mode.
691 * Output : None
692 * Return : The Data conversion value.
693 *******************************************************************************/
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