📄 stm32f10x_adc.lst
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436 * Description : Gets the selected ADC Software start conversion Status.
437 * Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
438 * Output : None
439 * Return : The new state of ADC software start conversion (SET or RESET).
440 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
441 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
442 {
\ ADC_GetSoftwareStartConvStatus:
\ 00000000 0100 MOVS R1,R0
443 FlagStatus bitstatus = RESET;
\ 00000002 0022 MOVS R2,#+0
\ 00000004 1000 MOVS R0,R2
444
445 /* Check the status of SWSTRT bit */
446 if ((ADCx->CR2 & CR2_SWSTRT_Set) != (u32)RESET)
\ 00000006 8A68 LDR R2,[R1, #+8]
\ 00000008 5FF48003 MOVS R3,#+4194304
\ 0000000C 1340 ANDS R3,R3,R2
\ 0000000E 5A1E SUBS R2,R3,#+1
\ 00000010 9241 SBCS R2,R2,R2
\ 00000012 D243 MVNS R2,R2
\ 00000014 D20F LSRS R2,R2,#+31
\ 00000016 1000 MOVS R0,R2
447 {
448 /* SWSTRT bit is set */
449 bitstatus = SET;
450 }
451 else
452 {
453 /* SWSTRT bit is reset */
454 bitstatus = RESET;
455 }
456 /* Return the SWSTRT bit status */
457 return bitstatus;
\ 00000018 C0B2 UXTB R0,R0 ;; ZeroExtS R0,R0,#+24,#+24
\ 0000001A 7047 BX LR ;; return
458 }
459
460 /*******************************************************************************
461 * Function Name : ADC_DiscModeChannelCountConfig
462 * Description : Configures the discontinuous mode for the selected ADC regular
463 * group channel.
464 * Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
465 * - Number: specifies the discontinuous mode regular channel
466 * count value. This number must be between 1 and 8.
467 * Output : None
468 * Return : None
469 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
470 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, u8 Number)
471 {
\ ADC_DiscModeChannelCountConfig:
\ 00000000 11B4 PUSH {R0,R4}
472 u32 tmpreg1 = 0;
\ 00000002 0024 MOVS R4,#+0
\ 00000004 2300 MOVS R3,R4
473 u8 tmpreg2 = 0;
\ 00000006 0024 MOVS R4,#+0
\ 00000008 2200 MOVS R2,R4
474
475 /* Check the parameters */
476 assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
477
478 /* Get the old register value */
479 tmpreg1 = ADCx->CR1;
\ 0000000A 4468 LDR R4,[R0, #+4]
\ 0000000C 2300 MOVS R3,R4
480 /* Clear the old discontinuous mode channel count */
481 tmpreg1 &= CR1_DISCNUM_Reset;
\ 0000000E 1C00 MOVS R4,R3
\ 00000010 7FF46043 MVNS R3,#+57344
\ 00000014 2340 ANDS R3,R3,R4
482 /* Set the discontinuous mode channel count */
483 tmpreg2 = Number - 1;
\ 00000016 4C1E SUBS R4,R1,#+1
\ 00000018 2200 MOVS R2,R4
484 tmpreg1 |= ((u32)tmpreg2 << 13);
\ 0000001A D2B2 UXTB R2,R2 ;; ZeroExtS R2,R2,#+24,#+24
\ 0000001C 53EA4233 ORRS R3,R3,R2, LSL #+13
485 /* Store the new register value */
486 ADCx->CR1 = tmpreg1;
\ 00000020 4360 STR R3,[R0, #+4]
487 }
\ 00000022 01B0 ADD SP,SP,#+4
\ 00000024 10BC POP {R4}
\ 00000026 7047 BX LR ;; return
488
489 /*******************************************************************************
490 * Function Name : ADC_DiscModeCmd
491 * Description : Enables or disables the discontinuous mode on regular group
492 * channel for the specified ADC
493 * Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
494 * - NewState: new state of the selected ADC discontinuous mode
495 * on regular group channel.
496 * This parameter can be: ENABLE or DISABLE.
497 * Output : None
498 * Return : None
499 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
500 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
501 {
502 /* Check the parameters */
503 assert_param(IS_FUNCTIONAL_STATE(NewState));
504
505 if (NewState != DISABLE)
\ ADC_DiscModeCmd:
\ 00000000 C9B2 UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
\ 00000002 0029 CMP R1,#+0
\ 00000004 04D0 BEQ.N ??ADC_DiscModeCmd_0
506 {
507 /* Enable the selected ADC regular discontinuous mode */
508 ADCx->CR1 |= CR1_DISCEN_Set;
\ 00000006 4268 LDR R2,[R0, #+4]
\ 00000008 52F40062 ORRS R2,R2,#0x800
\ 0000000C 4260 STR R2,[R0, #+4]
\ 0000000E 04E0 B.N ??ADC_DiscModeCmd_1
509 }
510 else
511 {
512 /* Disable the selected ADC regular discontinuous mode */
513 ADCx->CR1 &= CR1_DISCEN_Reset;
\ ??ADC_DiscModeCmd_0:
\ 00000010 4268 LDR R2,[R0, #+4]
\ 00000012 7FF40063 MVNS R3,#+2048
\ 00000016 1340 ANDS R3,R3,R2
\ 00000018 4360 STR R3,[R0, #+4]
514 }
515 }
\ ??ADC_DiscModeCmd_1:
\ 0000001A 7047 BX LR ;; return
516
517 /*******************************************************************************
518 * Function Name : ADC_RegularChannelConfig
519 * Description : Configures for the selected ADC regular channel its corresponding
520 * rank in the sequencer and its sample time.
521 * Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
522 * - ADC_Channel: the ADC channel to configure.
523 * This parameter can be one of the following values:
524 * - ADC_Channel_0: ADC Channel0 selected
525 * - ADC_Channel_1: ADC Channel1 selected
526 * - ADC_Channel_2: ADC Channel2 selected
527 * - ADC_Channel_3: ADC Channel3 selected
528 * - ADC_Channel_4: ADC Channel4 selected
529 * - ADC_Channel_5: ADC Channel5 selected
530 * - ADC_Channel_6: ADC Channel6 selected
531 * - ADC_Channel_7: ADC Channel7 selected
532 * - ADC_Channel_8: ADC Channel8 selected
533 * - ADC_Channel_9: ADC Channel9 selected
534 * - ADC_Channel_10: ADC Channel10 selected
535 * - ADC_Channel_11: ADC Channel11 selected
536 * - ADC_Channel_12: ADC Channel12 selected
537 * - ADC_Channel_13: ADC Channel13 selected
538 * - ADC_Channel_14: ADC Channel14 selected
539 * - ADC_Channel_15: ADC Channel15 selected
540 * - ADC_Channel_16: ADC Channel16 selected
541 * - ADC_Channel_17: ADC Channel17 selected
542 * - Rank: The rank in the regular group sequencer. This parameter
543 * must be between 1 to 16.
544 * - ADC_SampleTime: The sample time value to be set for the
545 * selected channel.
546 * This parameter can be one of the following values:
547 * - ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
548 * - ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
549 * - ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
550 * - ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles
551 * - ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles
552 * - ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles
553 * - ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles
554 * - ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles
555 * Output : None
556 * Return : None
557 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
558 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime)
559 {
\ ADC_RegularChannelConfig:
\ 00000000 F0B4 PUSH {R4-R7}
560 u32 tmpreg1 = 0, tmpreg2 = 0;
\ 00000002 0026 MOVS R6,#+0
\ 00000004 3500 MOVS R5,R6
\ 00000006 0026 MOVS R6,#+0
\ 00000008 3400 MOVS R4,R6
561
562 /* Check the parameters */
563 assert_param(IS_ADC_CHANNEL(ADC_Channel));
564 assert_param(IS_ADC_REGULAR_RANK(Rank));
565 assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
566
567 /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
568 if (ADC_Channel > ADC_Channel_9)
\ 0000000A C9B2 UXTB R1,R1 ;; ZeroExtS R1,R1,#+24,#+24
\ 0000000C 0A29 CMP R1,#+10
\ 0000000E 16D3 BCC.N ??ADC_RegularChannelConfig_0
569 {
570 /* Get the old register value */
571 tmpreg1 = ADCx->SMPR1;
\ 00000010 C668 LDR R6,[R0, #+12]
\ 00000012 3500 MOVS R5,R6
572 /* Calculate the mask to clear */
573 tmpreg2 = (u32)SMPR1_SMP_Set << (3 * (ADC_Channel - 10));
\ 00000014 0726 MOVS R6,#+7
\ 00000016 B446 MOV R12,R6
\ 00000018 B1F10A07 SUBS R7,R1,#+10
\ 0000001C 0326 MOVS R6,#+3
\ 0000001E 7743 MULS R7,R6,R7
\ 00000020 6646 MOV R6,R12
\ 00000022 BE40 LSLS R6,R6,R7
\ 00000024 3400 MOVS R4,R6
574 /* Clear the old discontinuous mode channel count */
575 tmpreg1 &= ~tmpreg2;
\ 00000026 A543 BICS R5,R5,R4
576 /* Calculate the mask to set */
577 tmpreg2 = (u32)ADC_SampleTime << (3 * (ADC_Channel - 10));
\ 00000028 DBB2 UXTB R3,R3 ;; ZeroExtS R3,R3,#+24,#+24
\ 0000002A B1F10A06 SUBS R6,R1,#+10
\ 0000002E 0327 MOVS R7,#+3
\ 00000030 7E43 MULS R6,R7,R6
\ 00000032 13FA06F6 LSLS R6,R3,R6
\ 00000036 3400 MOVS R4,R6
578 /* Set the discontinuous mode channel count */
579 tmpreg1 |= tmpreg2;
\ 00000038 2543 ORRS R5,R5,R4
580 /* Store the new register value */
581 ADCx->SMPR1 = tmpreg1;
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