📄 stm32f10x_rcc.lst
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573 * - RCC_LSE_OFF: LSE oscillator OFF
574 * - RCC_LSE_ON: LSE oscillator ON
575 * - RCC_LSE_Bypass: LSE oscillator bypassed with external
576 * clock
577 * Output : None
578 * Return : None
579 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
580 void RCC_LSEConfig(u32 RCC_LSE)
581 {
\ RCC_LSEConfig:
\ 00000000 01B5 PUSH {R0,LR}
582 /* Check the parameters */
583 assert_param(IS_RCC_LSE(RCC_LSE));
584
585 /* Reset LSEON and LSEBYP bits before configuring the LSE ------------------*/
586 /* Reset LSEON bit */
587 *(vu8 *) BDCR_BASE = RCC_LSE_OFF;
\ 00000002 .... LDR.N R1,??DataTable44 ;; 0x40021020
\ 00000004 0022 MOVS R2,#+0
\ 00000006 0A70 STRB R2,[R1, #+0]
588
589 /* Reset LSEBYP bit */
590 *(vu8 *) BDCR_BASE = RCC_LSE_OFF;
\ 00000008 .... LDR.N R1,??DataTable44 ;; 0x40021020
\ 0000000A 0022 MOVS R2,#+0
\ 0000000C 0A70 STRB R2,[R1, #+0]
591
592 /* Configure LSE (RCC_LSE_OFF is already covered by the code section above) */
593 switch(RCC_LSE)
\ 0000000E 0100 MOVS R1,R0
\ 00000010 491E SUBS R1,R1,#+1
\ 00000012 02D0 BEQ.N ??RCC_LSEConfig_0
\ 00000014 C91E SUBS R1,R1,#+3
\ 00000016 04D0 BEQ.N ??RCC_LSEConfig_1
\ 00000018 06E0 B.N ??RCC_LSEConfig_2
594 {
595 case RCC_LSE_ON:
596 /* Set LSEON bit */
597 *(vu8 *) BDCR_BASE = RCC_LSE_ON;
\ ??RCC_LSEConfig_0:
\ 0000001A .... LDR.N R1,??DataTable44 ;; 0x40021020
\ 0000001C 0122 MOVS R2,#+1
\ 0000001E 0A70 STRB R2,[R1, #+0]
\ 00000020 02E0 B.N ??RCC_LSEConfig_2
598 break;
599
600 case RCC_LSE_Bypass:
601 /* Set LSEBYP and LSEON bits */
602 *(vu8 *) BDCR_BASE = RCC_LSE_Bypass | RCC_LSE_ON;
\ ??RCC_LSEConfig_1:
\ 00000022 .... LDR.N R1,??DataTable44 ;; 0x40021020
\ 00000024 0522 MOVS R2,#+5
\ 00000026 0A70 STRB R2,[R1, #+0]
603 break;
604
605 default:
606 break;
607 }
608 }
\ ??RCC_LSEConfig_2:
\ 00000028 01B0 ADD SP,SP,#+4
\ 0000002A 00BD POP {PC} ;; return
609
610 /*******************************************************************************
611 * Function Name : RCC_LSICmd
612 * Description : Enables or disables the Internal Low Speed oscillator (LSI).
613 * LSI can not be disabled if the IWDG is running.
614 * Input : - NewState: new state of the LSI.
615 * This parameter can be: ENABLE or DISABLE.
616 * Output : None
617 * Return : None
618 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
619 void RCC_LSICmd(FunctionalState NewState)
620 {
621 /* Check the parameters */
622 assert_param(IS_FUNCTIONAL_STATE(NewState));
623
624 *(vu32 *) CSR_LSION_BB = (u32)NewState;
\ RCC_LSICmd:
\ 00000000 0149 LDR.N R1,??RCC_LSICmd_0 ;; 0x42420480
\ 00000002 C0B2 UXTB R0,R0 ;; ZeroExtS R0,R0,#+24,#+24
\ 00000004 0860 STR R0,[R1, #+0]
625 }
\ 00000006 7047 BX LR ;; return
\ ??RCC_LSICmd_0:
\ 00000008 80044242 DC32 0x42420480
626
627 /*******************************************************************************
628 * Function Name : RCC_RTCCLKConfig
629 * Description : Configures the RTC clock (RTCCLK).
630 * Once the RTC clock is selected it can抰 be changed unless the
631 * Backup domain is reset.
632 * Input : - RCC_RTCCLKSource: specifies the RTC clock source.
633 * This parameter can be one of the following values:
634 * - RCC_RTCCLKSource_LSE: LSE selected as RTC clock
635 * - RCC_RTCCLKSource_LSI: LSI selected as RTC clock
636 * - RCC_RTCCLKSource_HSE_Div128: HSE clock divided by 128
637 * selected as RTC clock
638 * Output : None
639 * Return : None
640 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
641 void RCC_RTCCLKConfig(u32 RCC_RTCCLKSource)
642 {
643 /* Check the parameters */
644 assert_param(IS_RCC_RTCCLK_SOURCE(RCC_RTCCLKSource));
645
646 /* Select the RTC clock source */
647 RCC->BDCR |= RCC_RTCCLKSource;
\ RCC_RTCCLKConfig:
\ 00000000 .... LDR.N R1,??DataTable44 ;; 0x40021020
\ 00000002 0968 LDR R1,[R1, #+0]
\ 00000004 0143 ORRS R1,R1,R0
\ 00000006 .... LDR.N R2,??DataTable44 ;; 0x40021020
\ 00000008 1160 STR R1,[R2, #+0]
648 }
\ 0000000A 7047 BX LR ;; return
649
650 /*******************************************************************************
651 * Function Name : RCC_RTCCLKCmd
652 * Description : Enables or disables the RTC clock.
653 * This function must be used only after the RTC clock was
654 * selected using the RCC_RTCCLKConfig function.
655 * Input : - NewState: new state of the RTC clock.
656 * This parameter can be: ENABLE or DISABLE.
657 * Output : None
658 * Return : None
659 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
660 void RCC_RTCCLKCmd(FunctionalState NewState)
661 {
662 /* Check the parameters */
663 assert_param(IS_FUNCTIONAL_STATE(NewState));
664
665 *(vu32 *) BDCR_RTCEN_BB = (u32)NewState;
\ RCC_RTCCLKCmd:
\ 00000000 0149 LDR.N R1,??RCC_RTCCLKCmd_0 ;; 0x4242043c
\ 00000002 C0B2 UXTB R0,R0 ;; ZeroExtS R0,R0,#+24,#+24
\ 00000004 0860 STR R0,[R1, #+0]
666 }
\ 00000006 7047 BX LR ;; return
\ ??RCC_RTCCLKCmd_0:
\ 00000008 3C044242 DC32 0x4242043c
667
668 /*******************************************************************************
669 * Function Name : RCC_GetClocksFreq
670 * Description : Returns the frequencies of different on chip clocks.
671 * Input : - RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which
672 * will hold the clocks frequencies.
673 * Output : None
674 * Return : None
675 *******************************************************************************/
\ In section .XML, align 4, keep-with-next
676 void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks)
677 {
\ RCC_GetClocksFreq:
\ 00000000 70B5 PUSH {R4-R6,LR}
678 u32 tmp = 0, pllmull = 0, pllsource = 0, presc = 0;
\ 00000002 0025 MOVS R5,#+0
\ 00000004 2900 MOVS R1,R5
\ 00000006 0025 MOVS R5,#+0
\ 00000008 2A00 MOVS R2,R5
\ 0000000A 0025 MOVS R5,#+0
\ 0000000C 2B00 MOVS R3,R5
\ 0000000E 0025 MOVS R5,#+0
\ 00000010 2C00 MOVS R4,R5
679
680 /* Get SYSCLK source -------------------------------------------------------*/
681 tmp = RCC->CFGR & CFGR_SWS_Mask;
\ 00000012 304D LDR.N R5,??RCC_GetClocksFreq_0 ;; 0x40021004
\ 00000014 2D68 LDR R5,[R5, #+0]
\ 00000016 15F00C01 ANDS R1,R5,#0xC
682
683 switch (tmp)
\ 0000001A 0D00 MOVS R5,R1
\ 0000001C 002D CMP R5,#+0
\ 0000001E 04D0 BEQ.N ??RCC_GetClocksFreq_1
\ 00000020 2D1F SUBS R5,R5,#+4
\ 00000022 05D0 BEQ.N ??RCC_GetClocksFreq_2
\ 00000024 2D1F SUBS R5,R5,#+4
\ 00000026 06D0 BEQ.N ??RCC_GetClocksFreq_3
\ 00000028 23E0 B.N ??RCC_GetClocksFreq_4
684 {
685 case 0x00: /* HSI used as system clock */
686 RCC_Clocks->SYSCLK_Frequency = HSI_Value;
\ ??RCC_GetClocksFreq_1:
\ 0000002A 2B4D LDR.N R5,??RCC_GetClocksFreq_0+0x4 ;; 0x7a1200
\ 0000002C 0560 STR R5,[R0, #+0]
\ 0000002E 22E0 B.N ??RCC_GetClocksFreq_5
687 break;
688
689 case 0x04: /* HSE used as system clock */
690 RCC_Clocks->SYSCLK_Frequency = HSE_Value;
\ ??RCC_GetClocksFreq_2:
\ 00000030 294D LDR.N R5,??RCC_GetClocksFreq_0+0x4 ;; 0x7a1200
\ 00000032 0560 STR R5,[R0, #+0]
\ 00000034 1FE0 B.N ??RCC_GetClocksFreq_5
691 break;
692
693 case 0x08: /* PLL used as system clock */
694 /* Get PLL clock source and multiplication factor ----------------------*/
695 pllmull = RCC->CFGR & CFGR_PLLMull_Mask;
\ ??RCC_GetClocksFreq_3:
\ 00000036 274D LDR.N R5,??RCC_GetClocksFreq_0 ;; 0x40021004
\ 00000038 2D68 LDR R5,[R5, #+0]
\ 0000003A 15F47012 ANDS R2,R5,#0x3C0000
696 pllmull = ( pllmull >> 18) + 2;
\ 0000003E 920C LSRS R2,R2,#+18
\ 00000040 921C ADDS R2,R2,#+2
697
698 pllsource = RCC->CFGR & CFGR_PLLSRC_Mask;
\ 00000042 244D LDR.N R5,??RCC_GetClocksFreq_0 ;; 0x40021004
\ 00000044 2D68 LDR R5,[R5, #+0]
\ 00000046 5FF48036 MOVS R6,#+65536
\ 0000004A 2E40 ANDS R6,R6,R5
\ 0000004C 3300 MOVS R3,R6
699
700 if (pllsource == 0x00)
\ 0000004E 002B CMP R3,#+0
\ 00000050 03D1 BNE.N ??RCC
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