stm32f10x_tim.lst

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    257                  /* Disable the Channel 3: Reset the CCE Bit */
    258                  TIMx->CCER &= CCER_CC3E_Reset;
   \   000000B2   048C               LDRH     R4,[R0, #+32]
   \   000000B4   ....               LDR.N    R5,??DataTable2  ;; 0x3233
   \   000000B6   2540               ANDS     R5,R5,R4
   \   000000B8   0584               STRH     R5,[R0, #+32]
    259          
    260                  /* Select the Output Compare Mode */
    261                  tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;
   \   000000BA   1400               MOVS     R4,R2
   \   000000BC   0A88               LDRH     R2,[R1, #+0]
   \   000000BE   2243               ORRS     R2,R2,R4
    262          
    263                  /* Set the Capture Compare Register value */
    264                  TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;
   \   000000C0   8C88               LDRH     R4,[R1, #+4]
   \   000000C2   8487               STRH     R4,[R0, #+60]
    265          
    266                  /* Set the Capture Compare Enable Bit */
    267                  tmpccer |= CCER_CC3E_Set;
   \   000000C4   53F48073           ORRS     R3,R3,#0x100
    268          
    269                  /* Set the Capture Compare Polarity */
    270                  tmpccer |= (u32)TIM_OCInitStruct->TIM_OCPolarity << 8;
   \   000000C8   CC88               LDRH     R4,[R1, #+6]
   \   000000CA   53EA0423           ORRS     R3,R3,R4, LSL #+8
   \   000000CE   0EE0               B.N      ??TIM_OCInit_8
    271                }
    272                else  /* TIM_Channel_4 */
    273                {
    274                  /* Disable the Channel 4: Reset the CCE Bit */
    275                  TIMx->CCER &= CCER_CC4E_Reset;
   \                     ??TIM_OCInit_7:
   \   000000D0   048C               LDRH     R4,[R0, #+32]
   \   000000D2   ....               LDR.N    R5,??DataTable3  ;; 0x2333
   \   000000D4   2540               ANDS     R5,R5,R4
   \   000000D6   0584               STRH     R5,[R0, #+32]
    276          
    277                 /* Select the Output Compare Mode */
    278                  tmpccmrx |= (u32)TIM_OCInitStruct->TIM_OCMode << 8;
   \   000000D8   0C88               LDRH     R4,[R1, #+0]
   \   000000DA   52EA0422           ORRS     R2,R2,R4, LSL #+8
    279          
    280                  /* Set the Capture Compare Register value */
    281                  TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;
   \   000000DE   8C88               LDRH     R4,[R1, #+4]
   \   000000E0   A0F84040           STRH     R4,[R0, #+64]
    282          
    283                  /* Set the Capture Compare Enable Bit */
    284                  tmpccer |= CCER_CC4E_Set;
   \   000000E4   53F48053           ORRS     R3,R3,#0x1000
    285          
    286                  /* Set the Capture Compare Polarity */
    287                  tmpccer |= (u32)TIM_OCInitStruct->TIM_OCPolarity << 12;
   \   000000E8   CC88               LDRH     R4,[R1, #+6]
   \   000000EA   53EA0433           ORRS     R3,R3,R4, LSL #+12
    288                }
    289          
    290                TIMx->CCMR2 = (u16)tmpccmrx;
   \                     ??TIM_OCInit_8:
   \   000000EE   1400               MOVS     R4,R2
   \   000000F0   8483               STRH     R4,[R0, #+28]
    291              }
    292            }
    293            
    294            TIMx->CCER = (u16)tmpccer;
   \                     ??TIM_OCInit_5:
   \   000000F2   1C00               MOVS     R4,R3
   \   000000F4   0484               STRH     R4,[R0, #+32]
    295          }
   \   000000F6   30BC               POP      {R4,R5}
   \   000000F8   7047               BX       LR               ;; return
   \   000000FA   00BF               Nop      
   \                     ??TIM_OCInit_2:
   \   000000FC   ........           DC32     Tab_OCModeMask
   \   00000100   ........           DC32     Tab_PolarityMask
    296          
    297          /*******************************************************************************
    298          * Function Name  : TIM_ICInit
    299          * Description    : Initializes the TIMx peripheral according to the specified
    300          *                  parameters in the TIM_ICInitStruct.
    301          * Input          : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
    302          *                  - TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
    303          *                    that contains the configuration information for the specified
    304          *                    TIM peripheral.
    305          * Output         : None
    306          * Return         : None
    307          *******************************************************************************/

   \                                 In section .XML, align 4, keep-with-next
    308          void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
    309          {
   \                     TIM_ICInit:
   \   00000000   31B5               PUSH     {R0,R4,R5,LR}
   \   00000002   0400               MOVS     R4,R0
   \   00000004   0D00               MOVS     R5,R1
    310            /* Check the parameters */
    311            assert_param(IS_TIM_IC_MODE(TIM_ICInitStruct->TIM_ICMode));
    312            assert_param(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel));
    313            assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity));
    314            assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection));
    315            assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler));
    316            assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter));
    317            
    318            if (TIM_ICInitStruct->TIM_ICMode == TIM_ICMode_ICAP)
   \   00000006   2888               LDRH     R0,[R5, #+0]
   \   00000008   0728               CMP      R0,#+7
   \   0000000A   34D1               BNE.N    ??TIM_ICInit_0
    319            {
    320              if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
   \   0000000C   6888               LDRH     R0,[R5, #+2]
   \   0000000E   0028               CMP      R0,#+0
   \   00000010   0AD1               BNE.N    ??TIM_ICInit_1
    321              {
    322                /* TI1 Configuration */
    323                TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
    324                           TIM_ICInitStruct->TIM_ICSelection,
    325                           TIM_ICInitStruct->TIM_ICFilter);
   \   00000012   AB7A               LDRB     R3,[R5, #+10]
   \   00000014   EA88               LDRH     R2,[R5, #+6]
   \   00000016   A988               LDRH     R1,[R5, #+4]
   \   00000018   2000               MOVS     R0,R4
   \   0000001A   ........           BL       TI1_Config
    326          
    327                /* Set the Input Capture Prescaler value */
    328                TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
   \   0000001E   2989               LDRH     R1,[R5, #+8]
   \   00000020   2000               MOVS     R0,R4
   \   00000022   ........           BL       TIM_SetIC1Prescaler
   \   00000026   2AE0               B.N      ??TIM_ICInit_2
    329              }
    330              else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)
   \                     ??TIM_ICInit_1:
   \   00000028   6888               LDRH     R0,[R5, #+2]
   \   0000002A   0128               CMP      R0,#+1
   \   0000002C   0AD1               BNE.N    ??TIM_ICInit_3
    331              {
    332                /* TI2 Configuration */
    333                TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
    334                           TIM_ICInitStruct->TIM_ICSelection,
    335                           TIM_ICInitStruct->TIM_ICFilter);
   \   0000002E   AB7A               LDRB     R3,[R5, #+10]
   \   00000030   EA88               LDRH     R2,[R5, #+6]
   \   00000032   A988               LDRH     R1,[R5, #+4]
   \   00000034   2000               MOVS     R0,R4
   \   00000036   ........           BL       TI2_Config
    336          
    337                /* Set the Input Capture Prescaler value */
    338                TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
   \   0000003A   2989               LDRH     R1,[R5, #+8]
   \   0000003C   2000               MOVS     R0,R4
   \   0000003E   ........           BL       TIM_SetIC2Prescaler
   \   00000042   1CE0               B.N      ??TIM_ICInit_2
    339              }
    340              else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3)
   \                     ??TIM_ICInit_3:
   \   00000044   6888               LDRH     R0,[R5, #+2]
   \   00000046   0228               CMP      R0,#+2
   \   00000048   0AD1               BNE.N    ??TIM_ICInit_4
    341              {
    342                /* TI3 Configuration */
    343                TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
    344                           TIM_ICInitStruct->TIM_ICSelection,
    345                           TIM_ICInitStruct->TIM_ICFilter);
   \   0000004A   AB7A               LDRB     R3,[R5, #+10]
   \   0000004C   EA88               LDRH     R2,[R5, #+6]
   \   0000004E   A988               LDRH     R1,[R5, #+4]
   \   00000050   2000               MOVS     R0,R4
   \   00000052   ........           BL       TI3_Config
    346          
    347                /* Set the Input Capture Prescaler value */
    348                TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
   \   00000056   2989               LDRH     R1,[R5, #+8]
   \   00000058   2000               MOVS     R0,R4
   \   0000005A   ........           BL       TIM_SetIC3Prescaler
   \   0000005E   0EE0               B.N      ??TIM_ICInit_2
    349              }
    350              else /* TIM_Channel_4 */
    351              {
    352                /* TI4 Configuration */
    353                TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
    354                           TIM_ICInitStruct->TIM_ICSelection,
    355                           TIM_ICInitStruct->TIM_ICFilter);
   \                     ??TIM_ICInit_4:
   \   00000060   AB7A               LDRB     R3,[R5, #+10]
   \   00000062   EA88               LDRH     R2,[R5, #+6]
   \   00000064   A988               LDRH     R1,[R5, #+4]
   \   00000066   2000               MOVS     R0,R4
   \   00000068   ........           BL       TI4_Config
    356          
    357                /* Set the Input Capture Prescaler value */
    358                TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
   \   0000006C   2989               LDRH     R1,[R5, #+8]
   \   0000006E   2000               MOVS     R0,R4
   \   00000070   ........           BL       TIM_SetIC4Prescaler
   \   00000074   03E0               B.N      ??TIM_ICInit_2
    359              }
    360            }
    361            else
    362            {
    363              PWMI_Config(TIMx, TIM_ICInitStruct);
   \                     ??TIM_ICInit_0:
   \   00000076   2900               MOVS     R1,R5
   \   00000078   2000               MOVS     R0,R4
   \   0000007A   ........           BL       PWMI_Config
    364            }
    365          }
   \                     ??TIM_ICInit_2:
   \   0000007E   01B0               ADD      SP,SP,#+4
   \   00000080   30BD               POP      {R4,R5,PC}       ;; return
    366          
    367          /*******************************************************************************
    368          * Function Name  : TIM_TimeBaseStructInit
    369          * Description    : Fills each TIM_TimeBaseInitStruct member with its default value.
    370          * Input          : - TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
    371          *                    structure which will be initialized.
    372          * Output         : None
    373          * Return         : None
    374          *******************************************************************************/

   \                                 In section .XML, align 4, keep-with-next
    375          void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
    376          {
    377            /* Set the default configuration */

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