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📄 stm32f10x_gpio.lst

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###############################################################################
#                                                                             #
#                                                       30/Jul/2008  11:02:23 #
# IAR ARM ANSI C/C++ Compiler V5.11.0.20622/W32 EVALUATION                    #
# Copyright 1999-2007 IAR Systems. All rights reserved.                       #
#                                                                             #
#    Cpu mode     =  thumb                                                    #
#    Endian       =  little                                                   #
#    Source file  =  E:\library\src\stm32f10x_gpio.c                          #
#    Command line =  E:\library\src\stm32f10x_gpio.c -D EMB_FLASH -lcN        #
#                    E:\ELE\yten\pro\Release\List\ -o                         #
#                    E:\ELE\yten\pro\Release\Obj\ --no_cse --no_unroll        #
#                    --no_inline --no_code_motion --no_tbaa --no_clustering   #
#                    --no_scheduling --debug --endian little --cpu Cortex-M3  #
#                    -e --fpu None --dlib_config "C:\Program Files\IAR        #
#                    Systems\Embedded Workbench 5.0                           #
#                    Evaluation\ARM\INC\DLib_Config_Normal.h" -I              #
#                    E:\ELE\yten\pro\ -I E:\ELE\yten\pro\..\LIBRARY\INC\ -I   #
#                    "C:\Program Files\IAR Systems\Embedded Workbench 5.0     #
#                    Evaluation\ARM\INC\" -On                                 #
#    List file    =  E:\ELE\yten\pro\Release\List\stm32f10x_gpio.lst          #
#    Object file  =  E:\ELE\yten\pro\Release\Obj\stm32f10x_gpio.o             #
#                                                                             #
#                                                                             #
###############################################################################

E:\library\src\stm32f10x_gpio.c
      1          /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
      2          * File Name          : stm32f10x_gpio.c
      3          * Author             : MCD Application Team
      4          * Version            : V1.0
      5          * Date               : 10/08/2007
      6          * Description        : This file provides all the GPIO firmware functions.
      7          ********************************************************************************
      8          * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
      9          * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
     10          * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
     11          * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
     12          * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
     13          * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
     14          *******************************************************************************/
     15          
     16          /* Includes ------------------------------------------------------------------*/
     17          #include "stm32f10x_gpio.h"
     18          #include "stm32f10x_rcc.h"
     19          
     20          /* Private typedef -----------------------------------------------------------*/
     21          /* Private define ------------------------------------------------------------*/
     22          /* ------------ RCC registers bit address in the alias region ----------- */
     23          #define AFIO_OFFSET                 (AFIO_BASE - PERIPH_BASE)
     24          
     25          /* --- EVENTCR Register ---*/
     26          /* Alias word address of EVOE bit */
     27          #define EVCR_OFFSET                 (AFIO_OFFSET + 0x00)
     28          #define EVOE_BitNumber              ((u8)0x07)
     29          #define EVCR_EVOE_BB                (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
     30          
     31          #define EVCR_PORTPINCONFIG_MASK     ((u16)0xFF80)
     32          #define LSB_MASK                    ((u16)0xFFFF)
     33          #define DBGAFR_POSITION_MASK        ((u32)0x000F0000)
     34          #define DBGAFR_SWJCFG_MASK          ((u32)0xF8FFFFFF)
     35          #define DBGAFR_LOCATION_MASK        ((u32)0x00200000)
     36          #define DBGAFR_NUMBITS_MASK         ((u32)0x00100000)
     37          
     38          /* Private macro -------------------------------------------------------------*/
     39          /* Private variables ---------------------------------------------------------*/
     40          /* Private function prototypes -----------------------------------------------*/
     41          /* Private functions ---------------------------------------------------------*/
     42          
     43          /*******************************************************************************
     44          * Function Name  : GPIO_DeInit
     45          * Description    : Deinitializes the GPIOx peripheral registers to their default
     46          *                  reset values.
     47          * Input          : - GPIOx: where x can be (A..E) to select the GPIO peripheral.
     48          * Output         : None
     49          * Return         : None
     50          *******************************************************************************/
     51          void GPIO_DeInit(GPIO_TypeDef* GPIOx)
     52          {
     53            switch (*(u32*)&GPIOx)
     54            {
     55              case GPIOA_BASE:
     56                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
     57                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
     58                break;
     59          
     60              case GPIOB_BASE:
     61                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
     62                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
     63                break;
     64          
     65              case GPIOC_BASE:
     66                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
     67                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
     68                break;
     69          
     70              case GPIOD_BASE:
     71                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
     72                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
     73                break;
     74          
     75              case GPIOE_BASE:
     76                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
     77                RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
     78                break;
     79          
     80              default:
     81                break;
     82            }
     83          }
     84          
     85          /*******************************************************************************
     86          * Function Name  : GPIO_AFIODeInit
     87          * Description    : Deinitializes the Alternate Functions (remap, event control
     88          *                  and EXTI configuration) registers to their default reset
     89          *                  values.
     90          * Input          : None
     91          * Output         : None
     92          * Return         : None
     93          *******************************************************************************/
     94          void GPIO_AFIODeInit(void)
     95          {
     96            RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
     97            RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
     98          }
     99          
    100          /*******************************************************************************
    101          * Function Name  : GPIO_Init
    102          * Description    : Initializes the GPIOx peripheral according to the specified
    103          *                  parameters in the GPIO_InitStruct.
    104          * Input          : - GPIOx: where x can be (A..E) to select the GPIO peripheral.
    105          *                  - GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
    106          *                    contains the configuration information for the specified GPIO
    107          *                    peripheral.
    108          * Output         : None
    109          * Return         : None
    110          *******************************************************************************/
    111          void GPIO_Init( GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
    112          {
    113            u32 currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
    114            u32 tmpreg = 0x00, pinmask = 0x00;
    115          
    116            /* Check the parameters */
    117            assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
    118            assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
    119          
    120          /*---------------------------- GPIO Mode Configuration -----------------------*/
    121            currentmode = ((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x0F);
    122          
    123            if ((((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x10)) != 0x00)
    124            {
    125              /* Check the parameters */
    126              assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
    127              /* Output mode */
    128              currentmode |= (u32)GPIO_InitStruct->GPIO_Speed;
    129            }
    130          
    131          /*---------------------------- GPIO CRL Configuration ------------------------*/
    132            /* Configure the eight low port pins */
    133            if (((u32)GPIO_InitStruct->GPIO_Pin & ((u32)0x00FF)) != 0x00)
    134            {
    135              tmpreg = GPIOx->CRL;
    136          
    137              for (pinpos = 0x00; pinpos < 0x08; pinpos++)
    138              {
    139                pos = ((u32)0x01) << pinpos;
    140                /* Get the port pins position */
    141                currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
    142          
    143                if (currentpin == pos)
    144                {
    145                  pos = pinpos << 2;
    146                  /* Clear the corresponding low control register bits */
    147                  pinmask = ((u32)0x0F) << pos;
    148                  tmpreg &= ~pinmask;
    149          
    150                  /* Write the mode configuration in the corresponding bits */
    151                  tmpreg |= (currentmode << pos);
    152          
    153                  /* Reset the corresponding ODR bit */
    154                  if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
    155                  {
    156                    GPIOx->BRR = (((u32)0x01) << pinpos);
    157                  }
    158                  /* Set the corresponding ODR bit */
    159                  if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
    160                  {
    161                    GPIOx->BSRR = (((u32)0x01) << pinpos);
    162                  }
    163                }
    164              }
    165              GPIOx->CRL = tmpreg;
    166              tmpreg = 0;
    167            }
    168          
    169          /*---------------------------- GPIO CRH Configuration ------------------------*/
    170            /* Configure the eight high port pins */
    171            if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
    172            {
    173              tmpreg = GPIOx->CRH;
    174              for (pinpos = 0x00; pinpos < 0x08; pinpos++)
    175              {
    176                pos = (((u32)0x01) << (pinpos + 0x08));
    177                /* Get the port pins position */
    178                currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
    179                if (currentpin == pos)
    180                {
    181                  pos = pinpos << 2;
    182                  /* Clear the corresponding high control register bits */

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