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📄 stm32f10x_dma.lst

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    354          *                    This parameter can be any combination of the following values:
    355          *                       - DMA_FLAG_GL1: Channel1 global flag.
    356          *                       - DMA_FLAG_TC1: Channel1 transfer complete flag.
    357          *                       - DMA_FLAG_HT1: Channel1 half transfer flag.
    358          *                       - DMA_FLAG_TE1: Channel1 transfer error flag.
    359          *                       - DMA_FLAG_GL2: Channel2 global flag.
    360          *                       - DMA_FLAG_TC2: Channel2 transfer complete flag.
    361          *                       - DMA_FLAG_HT2: Channel2 half transfer flag.
    362          *                       - DMA_FLAG_TE2: Channel2 transfer error flag.
    363          *                       - DMA_FLAG_GL3: Channel3 global flag.
    364          *                       - DMA_FLAG_TC3: Channel3 transfer complete flag.
    365          *                       - DMA_FLAG_HT3: Channel3 half transfer flag.
    366          *                       - DMA_FLAG_TE3: Channel3 transfer error flag.
    367          *                       - DMA_FLAG_GL4: Channel4 global flag.
    368          *                       - DMA_FLAG_TC4: Channel4 transfer complete flag.
    369          *                       - DMA_FLAG_HT4: Channel4 half transfer flag.
    370          *                       - DMA_FLAG_TE4: Channel4 transfer error flag.
    371          *                       - DMA_FLAG_GL5: Channel5 global flag.
    372          *                       - DMA_FLAG_TC5: Channel5 transfer complete flag.
    373          *                       - DMA_FLAG_HT5: Channel5 half transfer flag.
    374          *                       - DMA_FLAG_TE5: Channel5 transfer error flag.
    375          *                       - DMA_FLAG_GL6: Channel6 global flag.
    376          *                       - DMA_FLAG_TC6: Channel6 transfer complete flag.
    377          *                       - DMA_FLAG_HT6: Channel6 half transfer flag.
    378          *                       - DMA_FLAG_TE6: Channel6 transfer error flag.
    379          *                       - DMA_FLAG_GL7: Channel7 global flag.
    380          *                       - DMA_FLAG_TC7: Channel7 transfer complete flag.
    381          *                       - DMA_FLAG_HT7: Channel7 half transfer flag.
    382          *                       - DMA_FLAG_TE7: Channel7 transfer error flag.
    383          * Output         : None
    384          * Return         : None
    385          *******************************************************************************/
    386          void DMA_ClearFlag(u32 DMA_FLAG)
    387          {
    388            /* Check the parameters */
    389            assert_param(IS_DMA_CLEAR_FLAG(DMA_FLAG));
    390          
    391            /* Clear the selected DMA flags */
    392            DMA->IFCR = DMA_FLAG;
    393          }
    394          
    395          /*******************************************************************************
    396          * Function Name  : DMA_GetITStatus
    397          * Description    : Checks whether the specified DMA Channelx interrupt has 
    398          *                  occurred or not.
    399          * Input          : - DMA_IT: specifies the DMA interrupt source to check. 
    400          *                    This parameter can be one of the following values:
    401          *                       - DMA_IT_GL1: Channel1 global interrupt.
    402          *                       - DMA_IT_TC1: Channel1 transfer complete interrupt.
    403          *                       - DMA_IT_HT1: Channel1 half transfer interrupt.
    404          *                       - DMA_IT_TE1: Channel1 transfer error interrupt.
    405          *                       - DMA_IT_GL2: Channel2 global interrupt.
    406          *                       - DMA_IT_TC2: Channel2 transfer complete interrupt.
    407          *                       - DMA_IT_HT2: Channel2 half transfer interrupt.
    408          *                       - DMA_IT_TE2: Channel2 transfer error interrupt.
    409          *                       - DMA_IT_GL3: Channel3 global interrupt.
    410          *                       - DMA_IT_TC3: Channel3 transfer complete interrupt.
    411          *                       - DMA_IT_HT3: Channel3 half transfer interrupt.
    412          *                       - DMA_IT_TE3: Channel3 transfer error interrupt.
    413          *                       - DMA_IT_GL4: Channel4 global interrupt.
    414          *                       - DMA_IT_TC4: Channel4 transfer complete interrupt.
    415          *                       - DMA_IT_HT4: Channel4 half transfer interrupt.
    416          *                       - DMA_IT_TE4: Channel4 transfer error interrupt.
    417          *                       - DMA_IT_GL5: Channel5 global interrupt.
    418          *                       - DMA_IT_TC5: Channel5 transfer complete interrupt.
    419          *                       - DMA_IT_HT5: Channel5 half transfer interrupt.
    420          *                       - DMA_IT_TE5: Channel5 transfer error interrupt.
    421          *                       - DMA_IT_GL6: Channel6 global interrupt.
    422          *                       - DMA_IT_TC6: Channel6 transfer complete interrupt.
    423          *                       - DMA_IT_HT6: Channel6 half transfer interrupt.
    424          *                       - DMA_IT_TE6: Channel6 transfer error interrupt.
    425          *                       - DMA_IT_GL7: Channel7 global interrupt.
    426          *                       - DMA_IT_TC7: Channel7 transfer complete interrupt.
    427          *                       - DMA_IT_HT7: Channel7 half transfer interrupt.
    428          *                       - DMA_IT_TE7: Channel7 transfer error interrupt.
    429          * Output         : None
    430          * Return         : The new state of DMA_IT (SET or RESET).
    431          *******************************************************************************/
    432          ITStatus DMA_GetITStatus(u32 DMA_IT)
    433          {
    434            ITStatus bitstatus = RESET;
    435          
    436            /* Check the parameters */
    437            assert_param(IS_DMA_GET_IT(DMA_IT));
    438          
    439            /* Check the status of the specified DMA interrupt */
    440            if ((DMA->ISR & DMA_IT) != (u32)RESET)
    441            {
    442              /* DMA_IT is set */
    443              bitstatus = SET;
    444            }
    445            else
    446            {
    447              /* DMA_IT is reset */
    448              bitstatus = RESET;
    449            }
    450            /* Return the DMA_IT status */
    451            return  bitstatus;
    452          }
    453          
    454          /*******************************************************************************
    455          * Function Name  : DMA_ClearITPendingBit
    456          * Description    : Clears the DMA Channelx抯 interrupt pending bits.
    457          * Input          : - DMA_IT: specifies the DMA interrupt pending bit to clear.
    458          *                    This parameter can be any combination of the following values:
    459          *                       - DMA_IT_GL1: Channel1 global interrupt.
    460          *                       - DMA_IT_TC1: Channel1 transfer complete interrupt.
    461          *                       - DMA_IT_HT1: Channel1 half transfer interrupt.
    462          *                       - DMA_IT_TE1: Channel1 transfer error interrupt.
    463          *                       - DMA_IT_GL2: Channel2 global interrupt.
    464          *                       - DMA_IT_TC2: Channel2 transfer complete interrupt.
    465          *                       - DMA_IT_HT2: Channel2 half transfer interrupt.
    466          *                       - DMA_IT_TE2: Channel2 transfer error interrupt.
    467          *                       - DMA_IT_GL3: Channel3 global interrupt.
    468          *                       - DMA_IT_TC3: Channel3 transfer complete interrupt.
    469          *                       - DMA_IT_HT3: Channel3 half transfer interrupt.
    470          *                       - DMA_IT_TE3: Channel3 transfer error interrupt.
    471          *                       - DMA_IT_GL4: Channel4 global interrupt.
    472          *                       - DMA_IT_TC4: Channel4 transfer complete interrupt.
    473          *                       - DMA_IT_HT4: Channel4 half transfer interrupt.
    474          *                       - DMA_IT_TE4: Channel4 transfer error interrupt.
    475          *                       - DMA_IT_GL5: Channel5 global interrupt.
    476          *                       - DMA_IT_TC5: Channel5 transfer complete interrupt.
    477          *                       - DMA_IT_HT5: Channel5 half transfer interrupt.
    478          *                       - DMA_IT_TE5: Channel5 transfer error interrupt.
    479          *                       - DMA_IT_GL6: Channel6 global interrupt.
    480          *                       - DMA_IT_TC6: Channel6 transfer complete interrupt.
    481          *                       - DMA_IT_HT6: Channel6 half transfer interrupt.
    482          *                       - DMA_IT_TE6: Channel6 transfer error interrupt.
    483          *                       - DMA_IT_GL7: Channel7 global interrupt.
    484          *                       - DMA_IT_TC7: Channel7 transfer complete interrupt.
    485          *                       - DMA_IT_HT7: Channel7 half transfer interrupt.
    486          *                       - DMA_IT_TE7: Channel7 transfer error interrupt.
    487          * Output         : None
    488          * Return         : None
    489          *******************************************************************************/
    490          void DMA_ClearITPendingBit(u32 DMA_IT)
    491          {
    492            /* Check the parameters */
    493            assert_param(IS_DMA_CLEAR_IT(DMA_IT));
    494          
    495            /* Clear the selected DMA interrupt pending bits */
    496            DMA->IFCR = DMA_IT;
    497          }
    498          
    499          /******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/
    500          

   Maximum stack usage in bytes:

     Function               .cstack
     --------               -------
     DMA_ClearFlag               0
     DMA_ClearITPendingBit       0
     DMA_Cmd                     0
     DMA_DeInit                  8
     DMA_GetCurrDataCounter      0
     DMA_GetFlagStatus           0
     DMA_GetITStatus             0
     DMA_ITConfig                0
     DMA_Init                    8
     DMA_StructInit              0


   Section sizes:

     Function/Label         Bytes
     --------------         -----
     DMA_DeInit              164
     DMA_Init                 72
     DMA_StructInit           46
     DMA_Cmd                  26
     DMA_ITConfig             22
     DMA_GetCurrDataCounter    6
     DMA_GetFlagStatus        26
     DMA_ClearFlag             6
     DMA_GetITStatus          26
     DMA_ClearITPendingBit     6
     ??DataTable16             4
     ??DataTable17             4

 
 408 bytes in section .text
 
 408 bytes of CODE memory

Errors: none
Warnings: none

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