📄 stm32f10x_dma.lst
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164 /* Write to DMA Channelx CPAR */
165 DMA_Channelx->CPAR = DMA_InitStruct->DMA_PeripheralBaseAddr;
166
167 /*--------------------------- DMA Channelx CMAR Configuration ----------------*/
168 /* Write to DMA Channelx CMAR */
169 DMA_Channelx->CMAR = DMA_InitStruct->DMA_MemoryBaseAddr;
170 }
171
172 /*******************************************************************************
173 * Function Name : DMA_StructInit
174 * Description : Fills each DMA_InitStruct member with its default value.
175 * Input : - DMA_InitStruct : pointer to a DMA_InitTypeDef structure
176 * which will be initialized.
177 * Output : None
178 * Return : None
179 *******************************************************************************/
180 void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
181 {
182 /*-------------- Reset DMA init structure parameters values ------------------*/
183 /* Initialize the DMA_PeripheralBaseAddr member */
184 DMA_InitStruct->DMA_PeripheralBaseAddr = 0;
185
186 /* Initialize the DMA_MemoryBaseAddr member */
187 DMA_InitStruct->DMA_MemoryBaseAddr = 0;
188
189 /* Initialize the DMA_DIR member */
190 DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC;
191
192 /* Initialize the DMA_BufferSize member */
193 DMA_InitStruct->DMA_BufferSize = 0;
194
195 /* Initialize the DMA_PeripheralInc member */
196 DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable;
197
198 /* Initialize the DMA_MemoryInc member */
199 DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable;
200
201 /* Initialize the DMA_PeripheralDataSize member */
202 DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
203
204 /* Initialize the DMA_MemoryDataSize member */
205 DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
206
207 /* Initialize the DMA_Mode member */
208 DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
209
210 /* Initialize the DMA_Priority member */
211 DMA_InitStruct->DMA_Priority = DMA_Priority_Low;
212
213 /* Initialize the DMA_M2M member */
214 DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
215 }
216
217 /*******************************************************************************
218 * Function Name : DMA_Cmd
219 * Description : Enables or disables the specified DMA Channelx.
220 * Input : - DMA_Channelx: where x can be 1, 2 to 7 to select the DMA
221 * Channel.
222 * - NewState: new state of the DMA Channelx.
223 * This parameter can be: ENABLE or DISABLE.
224 * Output : None
225 * Return : None
226 *******************************************************************************/
227 void DMA_Cmd(DMA_Channel_TypeDef* DMA_Channelx, FunctionalState NewState)
228 {
229 /* Check the parameters */
230 assert_param(IS_FUNCTIONAL_STATE(NewState));
231
232 if (NewState != DISABLE)
233 {
234 /* Enable the selected DMA Channelx */
235 DMA_Channelx->CCR |= CCR_ENABLE_Set;
236 }
237 else
238 {
239 /* Disable the selected DMA Channelx */
240 DMA_Channelx->CCR &= CCR_ENABLE_Reset;
241 }
242 }
243
244 /*******************************************************************************
245 * Function Name : DMA_ITConfig
246 * Description : Enables or disables the specified DMA Channelx interrupts.
247 * Input : - DMA_IT: specifies the DMA interrupts sources to be enabled
248 * or disabled.
249 * This parameter can be any combination of the following values:
250 * - DMA_IT_TC: Transfer complete interrupt mask
251 * - DMA_IT_HT: Half transfer interrupt mask
252 * - DMA_IT_TE: Transfer error interrupt mask
253 * - NewState: new state of the specified DMA interrupts.
254 * This parameter can be: ENABLE or DISABLE.
255 * Output : None
256 * Return : None
257 *******************************************************************************/
258 void DMA_ITConfig(DMA_Channel_TypeDef* DMA_Channelx, u32 DMA_IT, FunctionalState NewState)
259 {
260 /* Check the parameters */
261 assert_param(IS_DMA_CONFIG_IT(DMA_IT));
262 assert_param(IS_FUNCTIONAL_STATE(NewState));
263
264 if (NewState != DISABLE)
265 {
266 /* Enable the selected DMA interrupts */
267 DMA_Channelx->CCR |= DMA_IT;
268 }
269 else
270 {
271 /* Disable the selected DMA interrupts */
272 DMA_Channelx->CCR &= ~DMA_IT;
273 }
274 }
275
276 /*******************************************************************************
277 * Function Name : DMA_GetCurrDataCounter
278 * Description : Returns the number of remaining data units in the current
279 * DMA Channelx transfer.
280 * Input : - DMA_Channelx: where x can be 1, 2 to 7 to select the DMA
281 * Channel.
282 * Output : None
283 * Return : The number of remaining data units in the current DMA Channel
284 * transfer..
285 *******************************************************************************/
286 u16 DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMA_Channelx)
287 {
288 /* Return the current memory address value for Channelx */
289 return ((u16)(DMA_Channelx->CNDTR));
290 }
291
292 /*******************************************************************************
293 * Function Name : DMA_GetFlagStatus
294 * Description : Checks whether the specified DMA Channelx flag is set or not.
295 * Input : - DMA_FLAG: specifies the flag to check.
296 * This parameter can be one of the following values:
297 * - DMA_FLAG_GL1: Channel1 global flag.
298 * - DMA_FLAG_TC1: Channel1 transfer complete flag.
299 * - DMA_FLAG_HT1: Channel1 half transfer flag.
300 * - DMA_FLAG_TE1: Channel1 transfer error flag.
301 * - DMA_FLAG_GL2: Channel2 global flag.
302 * - DMA_FLAG_TC2: Channel2 transfer complete flag.
303 * - DMA_FLAG_HT2: Channel2 half transfer flag.
304 * - DMA_FLAG_TE2: Channel2 transfer error flag.
305 * - DMA_FLAG_GL3: Channel3 global flag.
306 * - DMA_FLAG_TC3: Channel3 transfer complete flag.
307 * - DMA_FLAG_HT3: Channel3 half transfer flag.
308 * - DMA_FLAG_TE3: Channel3 transfer error flag.
309 * - DMA_FLAG_GL4: Channel4 global flag.
310 * - DMA_FLAG_TC4: Channel4 transfer complete flag.
311 * - DMA_FLAG_HT4: Channel4 half transfer flag.
312 * - DMA_FLAG_TE4: Channel4 transfer error flag.
313 * - DMA_FLAG_GL5: Channel5 global flag.
314 * - DMA_FLAG_TC5: Channel5 transfer complete flag.
315 * - DMA_FLAG_HT5: Channel5 half transfer flag.
316 * - DMA_FLAG_TE5: Channel5 transfer error flag.
317 * - DMA_FLAG_GL6: Channel6 global flag.
318 * - DMA_FLAG_TC6: Channel6 transfer complete flag.
319 * - DMA_FLAG_HT6: Channel6 half transfer flag.
320 * - DMA_FLAG_TE6: Channel6 transfer error flag.
321 * - DMA_FLAG_GL7: Channel7 global flag.
322 * - DMA_FLAG_TC7: Channel7 transfer complete flag.
323 * - DMA_FLAG_HT7: Channel7 half transfer flag.
324 * - DMA_FLAG_TE7: Channel7 transfer error flag.
325 * Output : None
326 * Return : The new state of DMA_FLAG (SET or RESET).
327 *******************************************************************************/
328 FlagStatus DMA_GetFlagStatus(u32 DMA_FLAG)
329 {
330 FlagStatus bitstatus = RESET;
331
332 /* Check the parameters */
333 assert_param(IS_DMA_GET_FLAG(DMA_FLAG));
334
335 /* Check the status of the specified DMA flag */
336 if ((DMA->ISR & DMA_FLAG) != (u32)RESET)
337 {
338 /* DMA_FLAG is set */
339 bitstatus = SET;
340 }
341 else
342 {
343 /* DMA_FLAG is reset */
344 bitstatus = RESET;
345 }
346 /* Return the DMA_FLAG status */
347 return bitstatus;
348 }
349
350 /*******************************************************************************
351 * Function Name : DMA_ClearFlag
352 * Description : Clears the DMA Channelx's pending flags.
353 * Input : - DMA_FLAG: specifies the flag to clear.
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