stm32f10x_tim.lst
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870 /*******************************************************************************
871 * Function Name : TIM_ForcedOC2Config
872 * Description : Forces the TIMx output 2 waveform to active or inactive level.
873 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
874 * - TIM_ForcedAction: specifies the forced Action to be set to
875 * the output waveform.
876 * This parameter can be one of the following values:
877 * - TIM_ForcedAction_Active: Force active level on OC2REF
878 * - TIM_ForcedAction_InActive: Force inactive level on
879 * OC2REF.
880 * Output : None
881 * Return : None
882 *******************************************************************************/
883 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction)
884 {
885 u32 tmpccmr1 = 0;
886
887 /* Check the parameters */
888 assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
889
890 tmpccmr1 = TIMx->CCMR1;
891
892 /* Reset the OCM Bits */
893 tmpccmr1 &= CCMR_OCM24_Mask;
894
895 /* Configure The Forced output Mode */
896 tmpccmr1 |= (u16)(TIM_ForcedAction << 8);
897
898 TIMx->CCMR1 = (u16)tmpccmr1;
899 }
900
901 /*******************************************************************************
902 * Function Name : TIM_ForcedOC3Config
903 * Description : Forces the TIMx output 3 waveform to active or inactive level.
904 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
905 * - TIM_ForcedAction: specifies the forced Action to be set to
906 * the output waveform.
907 * This parameter can be one of the following values:
908 * - TIM_ForcedAction_Active: Force active level on OC3REF
909 * - TIM_ForcedAction_InActive: Force inactive level on
910 * OC3REF.
911 * Output : None
912 * Return : None
913 *******************************************************************************/
914 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction)
915 {
916 u32 tmpccmr2 = 0;
917
918 /* Check the parameters */
919 assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
920
921 tmpccmr2 = TIMx->CCMR2;
922
923 /* Reset the OCM Bits */
924 tmpccmr2 &= CCMR_OCM13_Mask;
925
926 /* Configure The Forced output Mode */
927 tmpccmr2 |= TIM_ForcedAction;
928
929 TIMx->CCMR2 = (u16)tmpccmr2;
930 }
931
932 /*******************************************************************************
933 * Function Name : TIM_ForcedOC4Config
934 * Description : Forces the TIMx output 4 waveform to active or inactive level.
935 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
936 * - TIM_ForcedAction: specifies the forced Action to be set to
937 * the output waveform.
938 * This parameter can be one of the following values:
939 * - TIM_ForcedAction_Active: Force active level on OC4REF
940 * - TIM_ForcedAction_InActive: Force inactive level on
941 * OC4REF.
942 * Output : None
943 * Return : None
944 *******************************************************************************/
945 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction)
946 {
947 u32 tmpccmr2 = 0;
948
949 /* Check the parameters */
950 assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
951
952 tmpccmr2 = TIMx->CCMR2;
953
954 /* Reset the OCM Bits */
955 tmpccmr2 &= CCMR_OCM24_Mask;
956
957 /* Configure The Forced output Mode */
958 tmpccmr2 |= (u16)(TIM_ForcedAction << 8);
959
960 TIMx->CCMR2 = (u16)tmpccmr2;
961 }
962
963 /*******************************************************************************
964 * Function Name : TIM_ARRPreloadConfig
965 * Description : Enables or disables TIMx peripheral Preload register on ARR.
966 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
967 * - Newstate: new state of the TIMx peripheral Preload register
968 * This parameter can be: ENABLE or DISABLE.
969 * Output : None
970 * Return : None
971 *******************************************************************************/
972 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState Newstate)
973 {
974 u32 tmpcr1 = 0;
975
976 /* Check the parameters */
977 assert_param(IS_FUNCTIONAL_STATE(Newstate));
978
979 tmpcr1 = TIMx->CR1;
980
981 if (Newstate != DISABLE)
982 {
983 /* Set the ARR Preload Bit */
984 tmpcr1 |= CR1_ARPE_Set;
985 }
986 else
987 {
988 /* Reset the ARR Preload Bit */
989 tmpcr1 &= CR1_ARPE_Reset;
990 }
991
992 TIMx->CR1 = (u16)tmpcr1;
993 }
994
995 /*******************************************************************************
996 * Function Name : TIM_SelectCCDMA
997 * Description : Selects the TIMx peripheral Capture Compare DMA source.
998 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
999 * - Newstate: new state of the Capture Compare DMA source
1000 * This parameter can be: ENABLE or DISABLE.
1001 * Output : None
1002 * Return : None
1003 *******************************************************************************/
1004 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState Newstate)
1005 {
1006 u32 tmpcr2 = 0;
1007
1008 /* Check the parameters */
1009 assert_param(IS_FUNCTIONAL_STATE(Newstate));
1010
1011 tmpcr2 = TIMx->CR2;
1012
1013 if (Newstate != DISABLE)
1014 {
1015 /* Set the CCDS Bit */
1016 tmpcr2 |= CR2_CCDS_Set;
1017 }
1018 else
1019 {
1020 /* Reset the CCDS Bit */
1021 tmpcr2 &= CR2_CCDS_Reset;
1022 }
1023
1024 TIMx->CR2 = (u16)tmpcr2;
1025 }
1026
1027 /*******************************************************************************
1028 * Function Name : TIM_OC1PreloadConfig
1029 * Description : Enables or disables the TIMx peripheral Preload register on CCR1.
1030 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
1031 * - TIM_OCPreload: new state of the TIMx peripheral Preload
1032 * register
1033 * This parameter can be one of the following values:
1034 * - TIM_OCPreload_Enable
1035 * - TIM_OCPreload_Disable
1036 * Output : None
1037 * Return : None
1038 *******************************************************************************/
1039 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload)
1040 {
1041 u32 tmpccmr1 = 0;
1042
1043 /* Check the parameters */
1044 assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
1045
1046 tmpccmr1 = TIMx->CCMR1;
1047
1048 /* Reset the OCPE Bit */
1049 tmpccmr1 &= CCMR_OC13PE_Mask;
1050
1051 /* Enable or Disable the Output Compare Preload feature */
1052 tmpccmr1 |= TIM_OCPreload;
1053
1054 TIMx->CCMR1 = (u16)tmpccmr1;
1055 }
1056
1057 /*******************************************************************************
1058 * Function Name : TIM_OC2PreloadConfig
1059 * Description : Enables or disables the TIMx peripheral Preload register on CCR2.
1060 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
1061 * - TIM_OCPreload: new state of the TIMx peripheral Preload
1062 * register
1063 * This parameter can be one of the following values:
1064 * - TIM_OCPreload_Enable
1065 * - TIM_OCPreload_Disable
1066 * Output : None
1067 * Return : None
1068 *******************************************************************************/
1069 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload)
1070 {
1071 u32 tmpccmr1 = 0;
1072
1073 /* Check the parameters */
1074 assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
1075
1076 tmpccmr1 = TIMx->CCMR1;
1077
1078 /* Reset the OCPE Bit */
1079 tmpccmr1 &= CCMR_OC24PE_Mask;
1080
1081 /* Enable or Disable the Output Compare Preload feature */
1082 tmpccmr1 |= (u16)(TIM_OCPreload << 8);
1083
1084 TIMx->CCMR1 = (u16)tmpccmr1;
1085 }
1086
1087 /*******************************************************************************
1088 * Function Name : TIM_OC3PreloadConfig
1089 * Description : Enables or disables the TIMx peripheral Preload register on CCR3.
1090 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
1091 * - TIM_OCPreload: new state of the TIMx peripheral Preload
1092 * register
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