📄 stm32f10x_tim.lst
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# #
# 30/Jul/2008 11:02:25 #
# IAR ARM ANSI C/C++ Compiler V5.11.0.20622/W32 EVALUATION #
# Copyright 1999-2007 IAR Systems. All rights reserved. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = E:\library\src\stm32f10x_tim.c #
# Command line = E:\library\src\stm32f10x_tim.c -D EMB_FLASH -lcN #
# E:\ELE\yten\pro\Release\List\ -o #
# E:\ELE\yten\pro\Release\Obj\ --no_cse --no_unroll #
# --no_inline --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian little --cpu Cortex-M3 #
# -e --fpu None --dlib_config "C:\Program Files\IAR #
# Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\DLib_Config_Normal.h" -I #
# E:\ELE\yten\pro\ -I E:\ELE\yten\pro\..\LIBRARY\INC\ -I #
# "C:\Program Files\IAR Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\" -On #
# List file = E:\ELE\yten\pro\Release\List\stm32f10x_tim.lst #
# Object file = E:\ELE\yten\pro\Release\Obj\stm32f10x_tim.o #
# #
# #
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E:\library\src\stm32f10x_tim.c
1 /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 * File Name : stm32f10x_tim.c
3 * Author : MCD Application Team
4 * Version : V1.0
5 * Date : 10/08/2007
6 * Description : This file provides all the TIM firmware functions.
7 ********************************************************************************
8 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
9 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
10 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
11 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
12 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
13 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
14 *******************************************************************************/
15
16 /* Includes ------------------------------------------------------------------*/
17 #include "stm32f10x_tim.h"
18 #include "stm32f10x_rcc.h"
19
20 /* Private typedef -----------------------------------------------------------*/
21 /* Private define ------------------------------------------------------------*/
22 /* ---------------------- TIM registers bit mask ------------------------ */
23 #define CR1_CEN_Set ((u16)0x0001)
24 #define CR1_CEN_Reset ((u16)0x03FE)
25 #define CR1_UDIS_Set ((u16)0x0002)
26 #define CR1_UDIS_Reset ((u16)0x03FD)
27 #define CR1_URS_Set ((u16)0x0004)
28 #define CR1_URS_Reset ((u16)0x03FB)
29 #define CR1_OPM_Mask ((u16)0x03F7)
30 #define CR1_CounterMode_Mask ((u16)0x038F)
31 #define CR1_ARPE_Set ((u16)0x0080)
32 #define CR1_ARPE_Reset ((u16)0x037F)
33 #define CR1_CKD_Mask ((u16)0x00FF)
34
35 #define CR2_CCDS_Set ((u16)0x0008)
36 #define CR2_CCDS_Reset ((u16)0x00F0)
37 #define CR2_MMS_Mask ((u16)0x0080)
38 #define CR2_TI1S_Set ((u16)0x0080)
39 #define CR2_TI1S_Reset ((u16)0xFF70)
40
41 #define SMCR_SMS_Mask ((u16)0xFFF0)
42 #define SMCR_ETR_Mask ((u16)0x00F7)
43 #define SMCR_TS_Mask ((u16)0xFF87)
44 #define SMCR_MSM_Mask ((u16)0xFF77)
45 #define SMCR_ECE_Set ((u16)0x4000)
46
47 #define CCMR_CC13S_Mask ((u16)0xFFFC)
48 #define CCMR_CC24S_Mask ((u16)0xFCFF)
49 #define CCMR_TI13Direct_Set ((u16)0x0001)
50 #define CCMR_TI24Direct_Set ((u16)0x0100)
51 #define CCMR_OC13FE_Mask ((u16)0xFFFB)
52 #define CCMR_OC24FE_Mask ((u16)0xFBFF)
53 #define CCMR_OC13PE_Mask ((u16)0xFFF7)
54 #define CCMR_OC24PE_Mask ((u16)0xF7FF)
55 #define CCMR_OCM13_Mask ((u16)0xFF8F)
56 #define CCMR_OCM24_Mask ((u16)0x8FFF)
57
58 #define CCMR_OC13CE_Mask ((u16)0xFF7F)
59 #define CCMR_OC24CE_Mask ((u16)0x7FFF)
60
61 #define CCMR_IC13PSC_Mask ((u16)0xFFF3)
62 #define CCMR_IC24PSC_Mask ((u16)0xF3FF)
63 #define CCMR_IC13F_Mask ((u16)0xFF0F)
64 #define CCMR_IC24F_Mask ((u16)0x0FFF)
65
66 #define CCER_CC1P_Mask ((u16)0x3331)
67 #define CCER_CC2P_Mask ((u16)0x3313)
68 #define CCER_CC3P_Mask ((u16)0x3133)
69 #define CCER_CC4P_Mask ((u16)0x1333)
70
71 #define CCER_CC1E_Set ((u16)0x0001)
72 #define CCER_CC1E_Reset ((u16)0x3332)
73 #define CCER_CC1E_Mask ((u16)0x3332)
74
75 #define CCER_CC2E_Set ((u16)0x0010)
76 #define CCER_CC2E_Reset ((u16)0x3323)
77 #define CCER_CC2E_Mask ((u16)0x3323)
78
79 #define CCER_CC3E_Set ((u16)0x0100)
80 #define CCER_CC3E_Reset ((u16)0x3233)
81 #define CCER_CC3E_Mask ((u16)0x3233)
82
83 #define CCER_CC4E_Set ((u16)0x1000)
84 #define CCER_CC4E_Reset ((u16)0x2333)
85 #define CCER_CC4E_Mask ((u16)0x2333)
86
87 #define DCR_DMA_Mask ((u16)0x0000)
88
89 /* TIM private Masks */
90 #define TIM_Period_Reset_Mask ((u16)0x0000)
91 #define TIM_Prescaler_Reset_Mask ((u16)0x0000)
92 #define TIM_Pulse_Reset_Mask ((u16)0x0000)
93 #define TIM_ICFilter_Mask ((u8)0x00)
94
95 /* Private macro -------------------------------------------------------------*/
96 /* Private variables ---------------------------------------------------------*/
97 static uc16 Tab_OCModeMask[4] = {0xFF00, 0x00FF, 0xFF00, 0x00FF};
98 static uc16 Tab_PolarityMask[4] = {CCER_CC1P_Mask, CCER_CC2P_Mask, CCER_CC3P_Mask, CCER_CC4P_Mask};
99
100 /* Private function prototypes -----------------------------------------------*/
101 static void PWMI_Config(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
102 static void TI1_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
103 u8 TIM_ICFilter);
104 static void TI2_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
105 u8 TIM_ICFilter);
106 static void TI3_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
107 u8 TIM_ICFilter);
108 static void TI4_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
109 u8 TIM_ICFilter);
110 /* Private functions ---------------------------------------------------------*/
111
112 /*******************************************************************************
113 * Function Name : TIM_DeInit
114 * Description : Deinitializes the TIMx peripheral registers to their default
115 * reset values.
116 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
117 * Output : None
118 * Return : None
119 *******************************************************************************/
120 void TIM_DeInit(TIM_TypeDef* TIMx)
121 {
122 switch (*(u32*)&TIMx)
123 {
124 case TIM2_BASE:
125 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
126 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
127 break;
128
129 case TIM3_BASE:
130 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE);
131 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE);
132 break;
133
134 case TIM4_BASE:
135 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE);
136 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE);
137 break;
138
139 default:
140 break;
141 }
142 }
143
144 /*******************************************************************************
145 * Function Name : TIM_TimeBaseInit
146 * Description : Initializes the TIMx Time Base Unit peripheral according to
147 * the specified parameters in the TIM_TimeBaseInitStruct.
148 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
149 * - TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
150 * structure that contains the configuration information for
151 * the specified TIM peripheral.
152 * Output : None
153 * Return : None
154 *******************************************************************************/
155 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
156 {
157 /* Check the parameters */
158 assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode));
159 assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision));
160
161 /* Set the Autoreload value */
162 TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ;
163
164 /* Set the Prescaler value */
165 TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
166
167 /* Select the Counter Mode and set the clock division */
168 TIMx->CR1 &= CR1_CKD_Mask & CR1_CounterMode_Mask;
169 TIMx->CR1 |= (u32)TIM_TimeBaseInitStruct->TIM_ClockDivision |
170 TIM_TimeBaseInitStruct->TIM_CounterMode;
171 }
172 /*******************************************************************************
173 * Function Name : TIM_OCInit
174 * Description : Initializes the TIMx peripheral according to the specified
175 * parameters in the TIM_OCInitStruct.
176 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
177 * - TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
178 * that contains the configuration information for the specified
179 * TIM peripheral.
180 * Output : None
181 * Return : None
182 *******************************************************************************/
183 void TIM_OCInit(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
184 {
185 u32 tmpccmrx = 0, tmpccer = 0;
186
187 /* Check the parameters */
188 assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
189 assert_param(IS_TIM_CHANNEL(TIM_OCInitStruct->TIM_Channel));
190 assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
191
192 tmpccer = TIMx->CCER;
193
194 if ((TIM_OCInitStruct->TIM_Channel == (u16)TIM_Channel_1) ||
195 (TIM_OCInitStruct->TIM_Channel == (u16)TIM_Channel_2))
196 {
197 tmpccmrx = TIMx->CCMR1;
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