📄 stm32f10x_spi.lst
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# #
# 30/Jul/2008 11:02:24 #
# IAR ARM ANSI C/C++ Compiler V5.11.0.20622/W32 EVALUATION #
# Copyright 1999-2007 IAR Systems. All rights reserved. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = E:\library\src\stm32f10x_spi.c #
# Command line = E:\library\src\stm32f10x_spi.c -D EMB_FLASH -lcN #
# E:\ELE\yten\pro\Release\List\ -o #
# E:\ELE\yten\pro\Release\Obj\ --no_cse --no_unroll #
# --no_inline --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian little --cpu Cortex-M3 #
# -e --fpu None --dlib_config "C:\Program Files\IAR #
# Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\DLib_Config_Normal.h" -I #
# E:\ELE\yten\pro\ -I E:\ELE\yten\pro\..\LIBRARY\INC\ -I #
# "C:\Program Files\IAR Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\" -On #
# List file = E:\ELE\yten\pro\Release\List\stm32f10x_spi.lst #
# Object file = E:\ELE\yten\pro\Release\Obj\stm32f10x_spi.o #
# #
# #
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E:\library\src\stm32f10x_spi.c
1 /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 * File Name : stm32f10x_spi.c
3 * Author : MCD Application Team
4 * Version : V1.0
5 * Date : 10/08/2007
6 * Description : This file provides all the SPI firmware functions.
7 ********************************************************************************
8 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
9 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
10 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
11 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
12 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
13 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
14 *******************************************************************************/
15
16 /* Includes ------------------------------------------------------------------*/
17 #include "stm32f10x_spi.h"
18 #include "stm32f10x_rcc.h"
19
20 /* Private typedef -----------------------------------------------------------*/
21 /* Private define ------------------------------------------------------------*/
22 /* SPI SPE mask */
23 #define CR1_SPE_Set ((u16)0x0040)
24 #define CR1_SPE_Reset ((u16)0xFFBF)
25
26 /* SPI CRCNext mask */
27 #define CR1_CRCNext_Set ((u16)0x1000)
28
29 /* SPI CRCEN mask */
30 #define CR1_CRCEN_Set ((u16)0x2000)
31 #define CR1_CRCEN_Reset ((u16)0xDFFF)
32
33 /* SPI SSOE mask */
34 #define CR2_SSOE_Set ((u16)0x0004)
35 #define CR2_SSOE_Reset ((u16)0xFFFB)
36
37 /* SPI registers Masks */
38 #define CR1_CLEAR_Mask ((u16)0x3040)
39
40 /* Private macro -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private function prototypes -----------------------------------------------*/
43 /* Private functions ---------------------------------------------------------*/
44
45 /*******************************************************************************
46 * Function Name : SPI_DeInit
47 * Description : Deinitializes the SPIx peripheral registers to their default
48 * reset values.
49 * Input : - SPIx: where x can be 1 or 2 to select the SPI peripheral.
50 * Output : None
51 * Return : None
52 *******************************************************************************/
53 void SPI_DeInit(SPI_TypeDef* SPIx)
54 {
55 switch (*(u32*)&SPIx)
56 {
57 case SPI1_BASE:
58 /* Enable SPI1 reset state */
59 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
60 /* Release SPI1 from reset state */
61 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
62 break;
63
64 case SPI2_BASE:
65 /* Enable SPI2 reset state */
66 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
67 /* Release SPI2 from reset state */
68 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
69 break;
70
71 default:
72 break;
73 }
74 }
75
76 /*******************************************************************************
77 * Function Name : SPI_Init
78 * Description : Initializes the SPIx peripheral according to the specified
79 * parameters in the SPI_InitStruct.
80 * Input : - SPIx: where x can be 1 or 2 to select the SPI peripheral.
81 * - SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
82 * contains the configuration information for the specified
83 * SPI peripheral.
84 * Output : None
85 * Return : None
86 ******************************************************************************/
87 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
88 {
89 u16 tmpreg = 0;
90
91 /* Check the parameters */
92 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
93 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
94 assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
95 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
96 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
97 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
98 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
99 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
100 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
101
102 /*---------------------------- SPIx CR1 Configuration ------------------------*/
103 /* Get the SPIx CR1 value */
104 tmpreg = SPIx->CR1;
105 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
106 tmpreg &= CR1_CLEAR_Mask;
107 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
108 master/salve mode, CPOL and CPHA */
109 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
110 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
111 /* Set LSBFirst bit according to SPI_FirstBit value */
112 /* Set BR bits according to SPI_BaudRatePrescaler value */
113 /* Set CPOL bit according to SPI_CPOL value */
114 /* Set CPHA bit according to SPI_CPHA value */
115 tmpreg |= (u16)((u32)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
116 SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
117 SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
118 SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
119 /* Write to SPIx CR1 */
120 SPIx->CR1 = tmpreg;
121
122 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
123 /* Write to SPIx CRCPOLY */
124 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
125 }
126
127 /*******************************************************************************
128 * Function Name : SPI_StructInit
129 * Description : Fills each SPI_InitStruct member with its default value.
130 * Input : - SPI_InitStruct : pointer to a SPI_InitTypeDef structure
131 * which will be initialized.
132 * Output : None
133 * Return : None
134 *******************************************************************************/
135 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
136 {
137 /*--------------- Reset SPI init structure parameters values -----------------*/
138 /* Initialize the SPI_Direction member */
139 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
140
141 /* initialize the SPI_Mode member */
142 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
143
144 /* initialize the SPI_DataSize member */
145 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
146
147 /* Initialize the SPI_CPOL member */
148 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
149
150 /* Initialize the SPI_CPHA member */
151 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
152
153 /* Initialize the SPI_NSS member */
154 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
155
156 /* Initialize the SPI_BaudRatePrescaler member */
157 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
158
159 /* Initialize the SPI_FirstBit member */
160 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
161
162 /* Initialize the SPI_CRCPolynomial member */
163 SPI_InitStruct->SPI_CRCPolynomial = 7;
164 }
165
166 /*******************************************************************************
167 * Function Name : SPI_Cmd
168 * Description : Enables or disables the specified SPI peripheral.
169 * Input : - SPIx: where x can be 1 or 2 to select the SPI peripheral.
170 * - NewState: new state of the SPIx peripheral.
171 * This parameter can be: ENABLE or DISABLE.
172 * Output : None
173 * Return : None
174 *******************************************************************************/
175 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
176 {
177 /* Check the parameters */
178 assert_param(IS_FUNCTIONAL_STATE(NewState));
179
180 if (NewState != DISABLE)
181 {
182 /* Enable the selected SPI peripheral */
183 SPIx->CR1 |= CR1_SPE_Set;
184 }
185 else
186 {
187 /* Disable the selected SPI peripheral */
188 SPIx->CR1 &= CR1_SPE_Reset;
189 }
190 }
191
192 /*******************************************************************************
193 * Function Name : SPI_ITConfig
194 * Description : Enables or disables the specified SPI interrupts.
195 * Input : - SPIx: where x can be 1 or 2 to select the SPI peripheral.
196 * - SPI_IT: specifies the SPI interrupt source to be enabled
197 * or disabled.
198 * This parameter can be one of the following values:
199 * - SPI_IT_TXE: Tx buffer empty interrupt mask
200 * - SPI_IT_RXNE: Rx buffer not empty interrupt mask
201 * - SPI_IT_ERR: Error interrupt mask
202 * - NewState: new state of the specified SPI interrupt.
203 * This parameter can be: ENABLE or DISABLE.
204 * Output : None
205 * Return : None
206 *******************************************************************************/
207 void SPI_ITConfig(SPI_TypeDef* SPIx, u8 SPI_IT, FunctionalState NewState)
208 {
209 u16 itpos = 0, itmask = 0 ;
210
211 /* Check the parameters */
212 assert_param(IS_FUNCTIONAL_STATE(NewState));
213 assert_param(IS_SPI_CONFIG_IT(SPI_IT));
214
215 /* Get the SPI IT index */
216 itpos = SPI_IT >> 4;
217 /* Set the IT mask */
218 itmask = (u16)((u16)1 << itpos);
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