📄 untitled.mdl
字号:
B "1"
C "1"
D "1"
X0 "0"
AbsoluteTolerance "auto"
Realization "auto"
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
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Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType TransportDelay
DelayTime "1"
InitialOutput "0"
BufferSize "1024"
FixedBuffer off
TransDelayFeedthrough off
PadeOrder "0"
}
Block {
BlockType TriggerPort
TriggerType "rising"
StatesWhenEnabling "inherit"
ShowOutputPort off
OutputDataType "auto"
SampleTimeType "triggered"
SampleTime "1"
ZeroCross on
}
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AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "arial"
FontSize 9
FontWeight "normal"
FontAngle "normal"
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System {
Name "untitled"
Location [-63, 139, 944, 607]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "Analog\nFilter Design"
Ports [1, 1]
Position [325, 84, 385, 116]
SourceBlock "dsparch4/Analog\nFilter Design"
SourceType "Analog Filter Design"
method "Butterworth"
filttype "Bandpass"
N "8"
Wlo "80"
Whi "120"
Rp "2"
Rs "40"
}
Block {
BlockType Reference
Name "Analog\nFilter Design1"
Ports [1, 1]
Position [320, 164, 380, 196]
SourceBlock "dsparch4/Analog\nFilter Design"
SourceType "Analog Filter Design"
method "Butterworth"
filttype "Bandpass"
N "8"
Wlo "180"
Whi "220"
Rp "2"
Rs "40"
}
Block {
BlockType Logic
Name "Logical\nOperator"
Ports [2, 1]
Position [610, 122, 640, 153]
AllPortsSameDT off
OutDataTypeMode "Boolean"
}
Block {
BlockType Logic
Name "Logical\nOperator1"
Ports [2, 1]
Position [645, 357, 675, 388]
AllPortsSameDT off
OutDataTypeMode "Boolean"
}
Block {
BlockType DiscretePulseGenerator
Name "Pulse\nGenerator"
Ports [0, 1]
Position [85, 113, 130, 147]
PulseType "Time based"
PulseWidth "50"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator"
Position [515, 92, 545, 123]
Operator "<"
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator1"
Position [515, 157, 545, 188]
Operator ">"
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator2"
Position [550, 407, 580, 438]
Operator ">"
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator3"
Position [545, 327, 575, 358]
Operator "<"
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator4"
Position [805, 212, 835, 243]
Operator ">"
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType Reference
Name "Sample\nand Hold"
Ports [1, 1, 0, 1]
Position [685, 104, 735, 146]
SourceBlock "dspsigops/Sample\nand Hold"
SourceType "Sample and Hold"
ShowPortLabels on
trig "Falling edge"
initCond "0"
latchinput off
}
Block {
BlockType Reference
Name "Sample\nand Hold1"
Ports [1, 1, 0, 1]
Position [705, 294, 755, 336]
SourceBlock "dspsigops/Sample\nand Hold"
SourceType "Sample and Hold"
ShowPortLabels on
trig "Falling edge"
initCond "0"
latchinput off
}
Block {
BlockType Scope
Name "Scope"
Ports [2]
Position [265, 211, 295, 244]
Floating off
Location [-3, 48, 1021, 733]
Open off
NumInputPorts "2"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
}
YMin "-5~-5"
YMax "5~5"
DataFormat "StructureWithTime"
SampleTime "0"
}
Block {
BlockType Scope
Name "Scope1"
Ports [5]
Position [930, 162, 990, 258]
Floating off
Location [3, 163, 984, 630]
Open off
NumInputPorts "5"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
axes3 "%<SignalLabel>"
axes4 "%<SignalLabel>"
axes5 "%<SignalLabel>"
}
YMin "-5~-5~-5~-5~-5"
YMax "5~5~5~5~5"
SaveName "ScopeData1"
DataFormat "StructureWithTime"
SampleTime "0"
}
Block {
BlockType Sin
Name "Sine Wave"
Ports [0, 1]
Position [95, 55, 125, 85]
SineType "Time based"
Frequency "50"
SampleTime "0"
}
Block {
BlockType Sin
Name "Sine Wave1"
Ports [0, 1]
Position [95, 190, 125, 220]
SineType "Time based"
Frequency "80"
SampleTime "0"
}
Block {
BlockType Switch
Name "Switch"
Position [215, 115, 245, 145]
Threshold "0.5"
InputSameDT off
SaturateOnIntegerOverflow off
}
Block {
BlockType TransportDelay
Name "Transport\nDelay"
Position [430, 125, 460, 155]
DelayTime "0.001"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay1"
Position [430, 205, 460, 235]
DelayTime "0.002"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay2"
Position [445, 415, 475, 445]
DelayTime "0.002"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay3"
Position [440, 350, 470, 380]
DelayTime "0.001"
}
Line {
SrcBlock "Sine Wave"
SrcPort 1
Points [35, 0; 0, 50]
DstBlock "Switch"
DstPort 1
}
Line {
SrcBlock "Sine Wave1"
SrcPort 1
Points [35, 0; 0, -65]
DstBlock "Switch"
DstPort 3
}
Line {
SrcBlock "Pulse\nGenerator"
SrcPort 1
Points [40, 0]
Branch {
DstBlock "Switch"
DstPort 2
}
Branch {
Points [0, 105]
DstBlock "Scope"
DstPort 2
}
}
Line {
SrcBlock "Switch"
SrcPort 1
Points [0, 0]
Branch {
Points [35, 0]
Branch {
Points [0, -30]
DstBlock "Analog\nFilter Design"
DstPort 1
}
Branch {
Points [0, 50]
DstBlock "Analog\nFilter Design1"
DstPort 1
}
}
Branch {
DstBlock "Scope"
DstPort 1
}
}
Line {
SrcBlock "Analog\nFilter Design"
SrcPort 1
Points [10, 0]
Branch {
Points [20, 0]
Branch {
DstBlock "Relational\nOperator"
DstPort 1
}
Branch {
Points [0, -20; 225, 0; 0, 45; 5, 0]
Branch {
DstBlock "Sample\nand Hold"
DstPort 1
}
Branch {
Points [0, 45]
DstBlock "Scope1"
DstPort 1
}
}
}
Branch {
Points [0, 40]
Branch {
DstBlock "Transport\nDelay"
DstPort 1
}
Branch {
Points [0, 80]
DstBlock "Transport\nDelay1"
DstPort 1
}
}
}
Line {
SrcBlock "Transport\nDelay"
SrcPort 1
Points [15, 0]
Branch {
Points [0, -25]
DstBlock "Relational\nOperator"
DstPort 2
}
Branch {
Points [0, 25]
DstBlock "Relational\nOperator1"
DstPort 1
}
}
Line {
SrcBlock "Transport\nDelay1"
SrcPort 1
Points [15, 0; 0, -40]
DstBlock "Relational\nOperator1"
DstPort 2
}
Line {
SrcBlock "Relational\nOperator"
SrcPort 1
Points [20, 0; 0, 20]
DstBlock "Logical\nOperator"
DstPort 1
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Line {
SrcBlock "Relational\nOperator1"
SrcPort 1
Points [20, 0; 0, -30]
DstBlock "Logical\nOperator"
DstPort 2
}
Line {
SrcBlock "Logical\nOperator"
SrcPort 1
Points [15, 0; 0, -60; 50, 0]
DstBlock "Sample\nand Hold"
DstPort trigger
}
Line {
SrcBlock "Analog\nFilter Design1"
SrcPort 1
Points [0, 75]
Branch {
Points [0, 80; 10, 0]
Branch {
Points [15, 0]
Branch {
Points [0, 30]
DstBlock "Transport\nDelay3"
DstPort 1
}
Branch {
Points [55, 0]
Branch {
DstBlock "Relational\nOperator3"
DstPort 1
}
Branch {
Points [0, -20]
DstBlock "Sample\nand Hold1"
DstPort 1
}
}
}
Branch {
Points [0, 95]
DstBlock "Transport\nDelay2"
DstPort 1
}
}
Branch {
Points [385, 0; 0, 35; 135, 0; 0, -40]
DstBlock "Scope1"
DstPort 5
}
}
Line {
SrcBlock "Transport\nDelay3"
SrcPort 1
Points [25, 0]
Branch {
Points [0, -15]
DstBlock "Relational\nOperator3"
DstPort 2
}
Branch {
Points [0, 50]
DstBlock "Relational\nOperator2"
DstPort 1
}
}
Line {
SrcBlock "Transport\nDelay2"
SrcPort 1
DstBlock "Relational\nOperator2"
DstPort 2
}
Line {
SrcBlock "Relational\nOperator3"
SrcPort 1
Points [25, 0; 0, 20]
DstBlock "Logical\nOperator1"
DstPort 1
}
Line {
SrcBlock "Relational\nOperator2"
SrcPort 1
Points [20, 0; 0, -45]
DstBlock "Logical\nOperator1"
DstPort 2
}
Line {
SrcBlock "Logical\nOperator1"
SrcPort 1
Points [10, 0; 0, -96]
DstBlock "Sample\nand Hold1"
DstPort trigger
}
Line {
SrcBlock "Sample\nand Hold"
SrcPort 1
Points [30, 0; 0, 65]
Branch {
Points [0, 30]
DstBlock "Relational\nOperator4"
DstPort 1
}
Branch {
DstBlock "Scope1"
DstPort 2
}
}
Line {
SrcBlock "Sample\nand Hold1"
SrcPort 1
Points [30, 0; 0, -55]
Branch {
DstBlock "Relational\nOperator4"
DstPort 2
}
Branch {
Points [95, 0; 0, -30]
DstBlock "Scope1"
DstPort 4
}
}
Line {
SrcBlock "Relational\nOperator4"
SrcPort 1
Points [25, 0; 0, -20]
DstBlock "Scope1"
DstPort 3
}
}
}
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