part1.vo

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

	.portbbyteenamasks(1'b1),
	.devclrn(devclrn),
	.devpor(devpor),
	.portadataout(\Ram|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus ),
	.portbdataout());
// synopsys translate_off
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .logical_ram_name = "myram1:Ram|altsyncram:altsyncram_component|altsyncram_03a1:auto_generated|ALTSYNCRAM";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .operation_mode = "single_port";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_address_clear = "none";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_address_width = 5;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_byte_enable_clear = "none";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_data_in_clear = "none";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_data_out_clock = "clock0";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_data_width = 8;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_first_address = 0;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_last_address = 31;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 32;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_logical_ram_width = 8;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_a_write_enable_clear = "none";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_b_address_width = 5;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .port_b_data_width = 8;
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .ram_block_type = "M4K";
defparam \Ram|altsyncram_component|auto_generated|ram_block1a0 .safe_write = "err_on_2clk";
// synopsys translate_on

// atom is at PIN_AF7
cycloneii_io \LED[0]~I (
	.datain(\Ram|altsyncram_component|auto_generated|q_a [0]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(LED[0]));
// synopsys translate_off
defparam \LED[0]~I .input_async_reset = "none";
defparam \LED[0]~I .input_power_up = "low";
defparam \LED[0]~I .input_register_mode = "none";
defparam \LED[0]~I .input_sync_reset = "none";
defparam \LED[0]~I .oe_async_reset = "none";
defparam \LED[0]~I .oe_power_up = "low";
defparam \LED[0]~I .oe_register_mode = "none";
defparam \LED[0]~I .oe_sync_reset = "none";
defparam \LED[0]~I .operation_mode = "output";
defparam \LED[0]~I .output_async_reset = "none";
defparam \LED[0]~I .output_power_up = "low";
defparam \LED[0]~I .output_register_mode = "none";
defparam \LED[0]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AE7
cycloneii_io \LED[1]~I (
	.datain(\Ram|altsyncram_component|auto_generated|q_a [1]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(LED[1]));
// synopsys translate_off
defparam \LED[1]~I .input_async_reset = "none";
defparam \LED[1]~I .input_power_up = "low";
defparam \LED[1]~I .input_register_mode = "none";
defparam \LED[1]~I .input_sync_reset = "none";
defparam \LED[1]~I .oe_async_reset = "none";
defparam \LED[1]~I .oe_power_up = "low";
defparam \LED[1]~I .oe_register_mode = "none";
defparam \LED[1]~I .oe_sync_reset = "none";
defparam \LED[1]~I .operation_mode = "output";
defparam \LED[1]~I .output_async_reset = "none";
defparam \LED[1]~I .output_power_up = "low";
defparam \LED[1]~I .output_register_mode = "none";
defparam \LED[1]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AB8
cycloneii_io \LED[2]~I (
	.datain(\Ram|altsyncram_component|auto_generated|q_a [2]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(LED[2]));
// synopsys translate_off
defparam \LED[2]~I .input_async_reset = "none";
defparam \LED[2]~I .input_power_up = "low";
defparam \LED[2]~I .input_register_mode = "none";
defparam \LED[2]~I .input_sync_reset = "none";
defparam \LED[2]~I .oe_async_reset = "none";
defparam \LED[2]~I .oe_power_up = "low";
defparam \LED[2]~I .oe_register_mode = "none";
defparam \LED[2]~I .oe_sync_reset = "none";
defparam \LED[2]~I .operation_mode = "output";
defparam \LED[2]~I .output_async_reset = "none";
defparam \LED[2]~I .output_power_up = "low";
defparam \LED[2]~I .output_register_mode = "none";
defparam \LED[2]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_W8
cycloneii_io \LED[3]~I (
	.datain(\Ram|altsyncram_component|auto_generated|q_a [3]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(LED[3]));
// synopsys translate_off
defparam \LED[3]~I .input_async_reset = "none";
defparam \LED[3]~I .input_power_up = "low";
defparam \LED[3]~I .input_register_mode = "none";
defparam \LED[3]~I .input_sync_reset = "none";
defparam \LED[3]~I .oe_async_reset = "none";
defparam \LED[3]~I .oe_power_up = "low";
defparam \LED[3]~I .oe_register_mode = "none";
defparam \LED[3]~I .oe_sync_reset = "none";
defparam \LED[3]~I .operation_mode = "output";
defparam \LED[3]~I .output_async_reset = "none";
defparam \LED[3]~I .output_power_up = "low";
defparam \LED[3]~I .output_register_mode = "none";
defparam \LED[3]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AF6
cycloneii_io \LED[4]~I (
	.datain(\Ram|altsyncram_component|auto_generated|q_a [4]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(LED[4]));
// synopsys translate_off
defparam \LED[4]~I .input_async_reset = "none";
defparam \LED[4]~I .input_power_up = "low";
defparam \LED[4]~I .input_register_mode = "none";
defparam \LED[4]~I .input_sync_reset = "none";
defparam \LED[4]~I .oe_async_reset = "none";
defparam \LED[4]~I .oe_power_up = "low";
defparam \LED[4]~I .oe_register_mode = "none";
defparam \LED[4]~I .oe_sync_reset = "none";
defparam \LED[4]~I .operation_mode = "output";
defparam \LED[4]~I .output_async_reset = "none";
defparam \LED[4]~I .output_power_up = "low";
defparam \LED[4]~I .output_register_mode = "none";
defparam \LED[4]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AE6
cycloneii_io \LED[5]~I (
	.datain(\Ram|altsyncram_component|auto_generated|q_a [5]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(LED[5]));
// synopsys translate_off
defparam \LED[5]~I .input_async_reset = "none";
defparam \LED[5]~I .input_power_up = "low";
defparam \LED[5]~I .input_register_mode = "none";
defparam \LED[5]~I .input_sync_reset = "none";
defparam \LED[5]~I .oe_async_reset = "none";
defparam \LED[5]~I .oe_power_up = "low";
defparam \LED[5]~I .oe_register_mode = "none";
defparam \LED[5]~I .oe_sync_reset = "none";
defparam \LED[5]~I .operation_mode = "output";
defparam \LED[5]~I .output_async_reset = "none";
defparam \LED[5]~I .output_power_up = "low";
defparam \LED[5]~I .output_register_mode = "none";
defparam \LED[5]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AD7
cycloneii_io \LED[6]~I (
	.datain(\Ram|altsyncram_component|auto_generated|q_a [6]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(LED[6]));
// synopsys translate_off
defparam \LED[6]~I .input_async_reset = "none";
defparam \LED[6]~I .input_power_up = "low";
defparam \LED[6]~I .input_register_mode = "none";
defparam \LED[6]~I .input_sync_reset = "none";
defparam \LED[6]~I .oe_async_reset = "none";
defparam \LED[6]~I .oe_power_up = "low";
defparam \LED[6]~I .oe_register_mode = "none";
defparam \LED[6]~I .oe_sync_reset = "none";
defparam \LED[6]~I .operation_mode = "output";
defparam \LED[6]~I .output_async_reset = "none";
defparam \LED[6]~I .output_power_up = "low";
defparam \LED[6]~I .output_register_mode = "none";
defparam \LED[6]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AC7
cycloneii_io \LED[7]~I (
	.datain(\Ram|altsyncram_component|auto_generated|q_a [7]),
	.oe(vcc),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(LED[7]));
// synopsys translate_off
defparam \LED[7]~I .input_async_reset = "none";
defparam \LED[7]~I .input_power_up = "low";
defparam \LED[7]~I .input_register_mode = "none";
defparam \LED[7]~I .input_sync_reset = "none";
defparam \LED[7]~I .oe_async_reset = "none";
defparam \LED[7]~I .oe_power_up = "low";
defparam \LED[7]~I .oe_register_mode = "none";
defparam \LED[7]~I .oe_sync_reset = "none";
defparam \LED[7]~I .operation_mode = "output";
defparam \LED[7]~I .output_async_reset = "none";
defparam \LED[7]~I .output_power_up = "low";
defparam \LED[7]~I .output_register_mode = "none";
defparam \LED[7]~I .output_sync_reset = "none";
// synopsys translate_on

endmodule