part1.vo

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

defparam \Address[3]~I .input_async_reset = "none";
defparam \Address[3]~I .input_power_up = "low";
defparam \Address[3]~I .input_register_mode = "none";
defparam \Address[3]~I .input_sync_reset = "none";
defparam \Address[3]~I .oe_async_reset = "none";
defparam \Address[3]~I .oe_power_up = "low";
defparam \Address[3]~I .oe_register_mode = "none";
defparam \Address[3]~I .oe_sync_reset = "none";
defparam \Address[3]~I .operation_mode = "input";
defparam \Address[3]~I .output_async_reset = "none";
defparam \Address[3]~I .output_power_up = "low";
defparam \Address[3]~I .output_register_mode = "none";
defparam \Address[3]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AC11
cycloneii_io \Address[4]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Address~combout [4]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Address[4]));
// synopsys translate_off
defparam \Address[4]~I .input_async_reset = "none";
defparam \Address[4]~I .input_power_up = "low";
defparam \Address[4]~I .input_register_mode = "none";
defparam \Address[4]~I .input_sync_reset = "none";
defparam \Address[4]~I .oe_async_reset = "none";
defparam \Address[4]~I .oe_power_up = "low";
defparam \Address[4]~I .oe_register_mode = "none";
defparam \Address[4]~I .oe_sync_reset = "none";
defparam \Address[4]~I .operation_mode = "input";
defparam \Address[4]~I .output_async_reset = "none";
defparam \Address[4]~I .output_power_up = "low";
defparam \Address[4]~I .output_register_mode = "none";
defparam \Address[4]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AB12
cycloneii_io \Data[1]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Data~combout [1]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Data[1]));
// synopsys translate_off
defparam \Data[1]~I .input_async_reset = "none";
defparam \Data[1]~I .input_power_up = "low";
defparam \Data[1]~I .input_register_mode = "none";
defparam \Data[1]~I .input_sync_reset = "none";
defparam \Data[1]~I .oe_async_reset = "none";
defparam \Data[1]~I .oe_power_up = "low";
defparam \Data[1]~I .oe_register_mode = "none";
defparam \Data[1]~I .oe_sync_reset = "none";
defparam \Data[1]~I .operation_mode = "input";
defparam \Data[1]~I .output_async_reset = "none";
defparam \Data[1]~I .output_power_up = "low";
defparam \Data[1]~I .output_register_mode = "none";
defparam \Data[1]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AA12
cycloneii_io \Data[2]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Data~combout [2]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Data[2]));
// synopsys translate_off
defparam \Data[2]~I .input_async_reset = "none";
defparam \Data[2]~I .input_power_up = "low";
defparam \Data[2]~I .input_register_mode = "none";
defparam \Data[2]~I .input_sync_reset = "none";
defparam \Data[2]~I .oe_async_reset = "none";
defparam \Data[2]~I .oe_power_up = "low";
defparam \Data[2]~I .oe_register_mode = "none";
defparam \Data[2]~I .oe_sync_reset = "none";
defparam \Data[2]~I .operation_mode = "input";
defparam \Data[2]~I .output_async_reset = "none";
defparam \Data[2]~I .output_power_up = "low";
defparam \Data[2]~I .output_register_mode = "none";
defparam \Data[2]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AD12
cycloneii_io \Data[3]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Data~combout [3]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Data[3]));
// synopsys translate_off
defparam \Data[3]~I .input_async_reset = "none";
defparam \Data[3]~I .input_power_up = "low";
defparam \Data[3]~I .input_register_mode = "none";
defparam \Data[3]~I .input_sync_reset = "none";
defparam \Data[3]~I .oe_async_reset = "none";
defparam \Data[3]~I .oe_power_up = "low";
defparam \Data[3]~I .oe_register_mode = "none";
defparam \Data[3]~I .oe_sync_reset = "none";
defparam \Data[3]~I .operation_mode = "input";
defparam \Data[3]~I .output_async_reset = "none";
defparam \Data[3]~I .output_power_up = "low";
defparam \Data[3]~I .output_register_mode = "none";
defparam \Data[3]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AC12
cycloneii_io \Data[4]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Data~combout [4]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Data[4]));
// synopsys translate_off
defparam \Data[4]~I .input_async_reset = "none";
defparam \Data[4]~I .input_power_up = "low";
defparam \Data[4]~I .input_register_mode = "none";
defparam \Data[4]~I .input_sync_reset = "none";
defparam \Data[4]~I .oe_async_reset = "none";
defparam \Data[4]~I .oe_power_up = "low";
defparam \Data[4]~I .oe_register_mode = "none";
defparam \Data[4]~I .oe_sync_reset = "none";
defparam \Data[4]~I .operation_mode = "input";
defparam \Data[4]~I .output_async_reset = "none";
defparam \Data[4]~I .output_power_up = "low";
defparam \Data[4]~I .output_register_mode = "none";
defparam \Data[4]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_U12
cycloneii_io \Data[5]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Data~combout [5]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Data[5]));
// synopsys translate_off
defparam \Data[5]~I .input_async_reset = "none";
defparam \Data[5]~I .input_power_up = "low";
defparam \Data[5]~I .input_register_mode = "none";
defparam \Data[5]~I .input_sync_reset = "none";
defparam \Data[5]~I .oe_async_reset = "none";
defparam \Data[5]~I .oe_power_up = "low";
defparam \Data[5]~I .oe_register_mode = "none";
defparam \Data[5]~I .oe_sync_reset = "none";
defparam \Data[5]~I .operation_mode = "input";
defparam \Data[5]~I .output_async_reset = "none";
defparam \Data[5]~I .output_power_up = "low";
defparam \Data[5]~I .output_register_mode = "none";
defparam \Data[5]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AE11
cycloneii_io \Data[6]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Data~combout [6]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Data[6]));
// synopsys translate_off
defparam \Data[6]~I .input_async_reset = "none";
defparam \Data[6]~I .input_power_up = "low";
defparam \Data[6]~I .input_register_mode = "none";
defparam \Data[6]~I .input_sync_reset = "none";
defparam \Data[6]~I .oe_async_reset = "none";
defparam \Data[6]~I .oe_power_up = "low";
defparam \Data[6]~I .oe_register_mode = "none";
defparam \Data[6]~I .oe_sync_reset = "none";
defparam \Data[6]~I .operation_mode = "input";
defparam \Data[6]~I .output_async_reset = "none";
defparam \Data[6]~I .output_power_up = "low";
defparam \Data[6]~I .output_register_mode = "none";
defparam \Data[6]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_Y12
cycloneii_io \Data[7]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Data~combout [7]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Data[7]));
// synopsys translate_off
defparam \Data[7]~I .input_async_reset = "none";
defparam \Data[7]~I .input_power_up = "low";
defparam \Data[7]~I .input_register_mode = "none";
defparam \Data[7]~I .input_sync_reset = "none";
defparam \Data[7]~I .oe_async_reset = "none";
defparam \Data[7]~I .oe_power_up = "low";
defparam \Data[7]~I .oe_register_mode = "none";
defparam \Data[7]~I .oe_sync_reset = "none";
defparam \Data[7]~I .operation_mode = "input";
defparam \Data[7]~I .output_async_reset = "none";
defparam \Data[7]~I .output_power_up = "low";
defparam \Data[7]~I .output_register_mode = "none";
defparam \Data[7]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at M4K_X26_Y1
cycloneii_ram_block \Ram|altsyncram_component|auto_generated|ram_block1a0 (
	.portawe(\Wren~combout ),
	.portaaddrstall(gnd),
	.portbrewe(vcc),
	.portbaddrstall(gnd),
	.clk0(\CLK~clkctrl_outclk ),
	.clk1(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.clr0(gnd),
	.clr1(gnd),
	.portadatain({\Data~combout [7],\Data~combout [6],\Data~combout [5],\Data~combout [4],\Data~combout [3],\Data~combout [2],\Data~combout [1],\Data~combout [0]}),
	.portaaddr({\Address~combout [4],\Address~combout [3],\Address~combout [2],\Address~combout [1],\Address~combout [0]}),
	.portabyteenamasks(1'b1),
	.portbdatain(8'b00000000),
	.portbaddr(5'b00000),