prev_cmp_part6.tan.qmsg

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

{ "Info" "ITDB_FULL_TPD_RESULT" "Data\[5\] SEG_DATA\[6\] 14.882 ns Longest " "Info: Longest tpd from source pin \"Data\[5\]\" to destination pin \"SEG_DATA\[6\]\" is 14.882 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.840 ns) 0.840 ns Data\[5\] 1 PIN PIN_U12 8 " "Info: 1: + IC(0.000 ns) + CELL(0.840 ns) = 0.840 ns; Loc. = PIN_U12; Fanout = 8; PIN Node = 'Data\[5\]'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { Data[5] } "NODE_NAME" } } { "part6.v" "" { Text "C:/altera/72sp2/LAB8/part6/part6.v" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(5.877 ns) + CELL(0.438 ns) 7.155 ns display:D4\|out\[6\]~509 2 COMB LCCOMB_X23_Y12_N2 1 " "Info: 2: + IC(5.877 ns) + CELL(0.438 ns) = 7.155 ns; Loc. = LCCOMB_X23_Y12_N2; Fanout = 1; COMB Node = 'display:D4\|out\[6\]~509'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "6.315 ns" { Data[5] display:D4|out[6]~509 } "NODE_NAME" } } { "part6.v" "" { Text "C:/altera/72sp2/LAB8/part6/part6.v" 160 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.239 ns) + CELL(0.150 ns) 7.544 ns SEG_DATA~3393 3 COMB LCCOMB_X23_Y12_N12 1 " "Info: 3: + IC(0.239 ns) + CELL(0.150 ns) = 7.544 ns; Loc. = LCCOMB_X23_Y12_N12; Fanout = 1; COMB Node = 'SEG_DATA~3393'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "0.389 ns" { display:D4|out[6]~509 SEG_DATA~3393 } "NODE_NAME" } } { "part6.v" "" { Text "C:/altera/72sp2/LAB8/part6/part6.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.679 ns) + CELL(0.416 ns) 8.639 ns SEG_DATA~3394 4 COMB LCCOMB_X25_Y12_N6 1 " "Info: 4: + IC(0.679 ns) + CELL(0.416 ns) = 8.639 ns; Loc. = LCCOMB_X25_Y12_N6; Fanout = 1; COMB Node = 'SEG_DATA~3394'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "1.095 ns" { SEG_DATA~3393 SEG_DATA~3394 } "NODE_NAME" } } { "part6.v" "" { Text "C:/altera/72sp2/LAB8/part6/part6.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.269 ns) + CELL(0.438 ns) 9.346 ns SEG_DATA~3395 5 COMB LCCOMB_X25_Y12_N26 1 " "Info: 5: + IC(0.269 ns) + CELL(0.438 ns) = 9.346 ns; Loc. = LCCOMB_X25_Y12_N26; Fanout = 1; COMB Node = 'SEG_DATA~3395'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "0.707 ns" { SEG_DATA~3394 SEG_DATA~3395 } "NODE_NAME" } } { "part6.v" "" { Text "C:/altera/72sp2/LAB8/part6/part6.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.757 ns) + CELL(2.779 ns) 14.882 ns SEG_DATA\[6\] 6 PIN PIN_AA6 0 " "Info: 6: + IC(2.757 ns) + CELL(2.779 ns) = 14.882 ns; Loc. = PIN_AA6; Fanout = 0; PIN Node = 'SEG_DATA\[6\]'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "5.536 ns" { SEG_DATA~3395 SEG_DATA[6] } "NODE_NAME" } } { "part6.v" "" { Text "C:/altera/72sp2/LAB8/part6/part6.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.061 ns ( 34.01 % ) " "Info: Total cell delay = 5.061 ns ( 34.01 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.821 ns ( 65.99 % ) " "Info: Total interconnect delay = 9.821 ns ( 65.99 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "14.882 ns" { Data[5] display:D4|out[6]~509 SEG_DATA~3393 SEG_DATA~3394 SEG_DATA~3395 SEG_DATA[6] } "NODE_NAME" } } { "c:/altera/72sp2/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72sp2/quartus/bin/Technology_Viewer.qrui" "14.882 ns" { Data[5] {} Data[5]~combout {} display:D4|out[6]~509 {} SEG_DATA~3393 {} SEG_DATA~3394 {} SEG_DATA~3395 {} SEG_DATA[6] {} } { 0.000ns 0.000ns 5.877ns 0.239ns 0.679ns 0.269ns 2.757ns } { 0.000ns 0.840ns 0.438ns 0.150ns 0.416ns 0.438ns 2.779ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0}
{ "Info" "ITDB_TH_RESULT" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[5\] altera_internal_jtag~TMSUTAP altera_internal_jtag~TCKUTAP 2.049 ns register " "Info: th for register \"sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[5\]\" (data pin = \"altera_internal_jtag~TMSUTAP\", clock pin = \"altera_internal_jtag~TCKUTAP\") is 2.049 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 4.453 ns + Longest register " "Info: + Longest clock path from clock \"altera_internal_jtag~TCKUTAP\" to destination register is 4.453 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y19_N0 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y19_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.888 ns) + CELL(0.000 ns) 2.888 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G3 125 " "Info: 2: + IC(2.888 ns) + CELL(0.000 ns) = 2.888 ns; Loc. = CLKCTRL_G3; Fanout = 125; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "2.888 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.028 ns) + CELL(0.537 ns) 4.453 ns sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[5\] 3 REG LCFF_X22_Y15_N31 6 " "Info: 3: + IC(1.028 ns) + CELL(0.537 ns) = 4.453 ns; Loc. = LCFF_X22_Y15_N31; Fanout = 6; REG Node = 'sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[5\]'" {  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "1.565 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5] } "NODE_NAME" } } { "../../quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/72sp2/quartus/libraries/megafunctions/sld_hub.vhd" 1163 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.537 ns ( 12.06 % ) " "Info: Total cell delay = 0.537 ns ( 12.06 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.916 ns ( 87.94 % ) " "Info: Total interconnect delay = 3.916 ns ( 87.94 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72sp2/quartus/bin/TimingClosureFloorplan.fld" "" "4.453 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5] } "NODE_NAME" } } { "c:/altera/72sp2/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72sp2/quartus/bin/Technology_Viewer.qrui" "4.453 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5] {} } { 0.000ns 2.888ns 1.028ns } { 0.000ns 0.000ns 0.537ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TH_DELAY" "0.266 ns + " "Info: + Micro hold delay of destination is 0.266 ns" {  } { { "../../quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/72sp2/quartus/libraries/megafunctions/sld_hub.vhd" 1163 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0} { "Info"