📄 part6.fit.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.1 Build 163 10/28/2008 SJ Web Edition " "Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri May 15 12:01:10 2009 " "Info: Processing started: Fri May 15 12:01:10 2009" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off part6 -c part6 " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off part6 -c part6" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "part6 EP2C35F672C6 " "Info: Selected device EP2C35F672C6 for design \"part6\"" { } { } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 0}
{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Warning: Feature LogicLock is not available with your current license" { } { } 0 0 "Feature %1!s! is not available with your current license" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F672C6 " "Info: Device EP2C50F672C6 is compatible" { } { } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C70F672C6 " "Info: Device EP2C70F672C6 is compatible" { } { } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0} } { } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Info: Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ E3 " "Info: Pin ~ASDO~ is reserved at location E3" { } { { "c:/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/81/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } } } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ D3 " "Info: Pin ~nCSO~ is reserved at location D3" { } { { "c:/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/81/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } } } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS150p/nCEO~ AE24 " "Info: Pin ~LVDS150p/nCEO~ is reserved at location AE24" { } { { "c:/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/81/quartus/bin/pin_planner.ppl" { ~LVDS150p/nCEO~ } } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS150p/nCEO~ } "NODE_NAME" } } } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0} } { } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Info: Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." { } { } 0 0 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "" 0 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" { } { } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0 0}
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." { } { } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "CLK (placed in PIN N1 (CLK1, LVDSCLK0n, Input)) " "Info: Automatically promoted node CLK (placed in PIN N1 (CLK1, LVDSCLK0n, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G2 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2" { } { } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Clock " "Info: Destination node Clock" { } { { "part6.v" "" { Text "C:/Users/Sophy/Desktop/LAB_8/part6/part6.v" 13 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { Clock } "NODE_NAME" } } } 0 0 "Destination node %1!s!" 0 0 "" 0 0} } { } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0} } { { "c:/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/81/quartus/bin/pin_planner.ppl" { CLK } } } { "c:/altera/81/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/81/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } } { "part6.v" "" { Text "C:/Users/Sophy/Desktop/LAB_8/part6/part6.v" 2 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLK } "NODE_NAME" } } } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "altera_internal_jtag~TCKUTAP " "Info: Automatically promoted node altera_internal_jtag~TCKUTAP " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} } { { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } } } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Clock " "Info: Automatically promoted node Clock " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Clock~18 " "Info: Destination node Clock~18" { } { { "part6.v" "" { Text "C:/Users/Sophy/Desktop/LAB_8/part6/part6.v" 13 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { Clock~18 } "NODE_NAME" } } } 0 0 "Destination node %1!s!" 0 0 "" 0 0} } { } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0} } { { "part6.v" "" { Text "C:/Users/Sophy/Desktop/LAB_8/part6/part6.v" 13 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { Clock } "NODE_NAME" } } } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|clr_reg " "Info: Automatically promoted node sld_hub:sld_hub_inst\|clr_reg " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|hub_mode_reg\[2\]~0 " "Info: Destination node sld_hub:sld_hub_inst\|hub_mode_reg\[2\]~0" { } { { "../../../../../altera/81/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/81/quartus/libraries/megafunctions/sld_hub.vhd" 298 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|hub_mode_reg[2]~0 } "NODE_NAME" } } } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|hub_mode_reg\[2\]~466 " "Info: Destination node sld_hub:sld_hub_inst\|hub_mode_reg\[2\]~466" { } { { "../../../../../altera/81/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/81/quartus/libraries/megafunctions/sld_hub.vhd" 298 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|hub_mode_reg[2]~466 } "NODE_NAME" } } } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|clr_reg~_wirecell " "Info: Destination node sld_hub:sld_hub_inst\|clr_reg~_wirecell" { } { { "../../../../../altera/81/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/81/quartus/libraries/megafunctions/sld_hub.vhd" 311 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|clr_reg~_wirecell } "NODE_NAME" } } } 0 0 "Destination node %1!s!" 0 0 "" 0 0} } { } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0} } { { "../../../../../altera/81/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/81/quartus/libraries/megafunctions/sld_hub.vhd" 311 -1 0 } } { "c:/altera/81/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/81/quartus/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|clr_reg" } } } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|clr_reg } "NODE_NAME" } } } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_shadow_jsm:shadow_jsm\|state\[0\] " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_shadow_jsm:shadow_jsm\|state\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_shadow_jsm:shadow_jsm\|state~328 " "Info: Destination node sld_hub:sld_hub_inst\|sld_shadow_jsm:shadow_jsm\|state~328" { } { { "../../../../../altera/81/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/81/quartus/libraries/megafunctions/sld_hub.vhd" 987 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_shadow_jsm:shadow_jsm|state~328 } "NODE_NAME" } } } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_shadow_jsm:shadow_jsm\|state~3 " "Info: Destination node sld_hub:sld_hub_inst\|sld_shadow_jsm:shadow_jsm\|state~3" { } { { "../../../../../altera/81/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/81/quartus/libraries/megafunctions/sld_hub.vhd" 987 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_shadow_jsm:shadow_jsm|state~3 } "NODE_NAME" } } } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_shadow_jsm:shadow_jsm\|state\[0\]~_wirecell " "Info: Destination node sld_hub:sld_hub_inst\|sld_shadow_jsm:shadow_jsm\|state\[0\]~_wirecell" { } { { "../../../../../altera/81/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/81/quartus/libraries/megafunctions/sld_hub.vhd" 987 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]~_wirecell } "NODE_NAME" } } } 0 0 "Destination node %1!s!" 0 0 "" 0 0} } { } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0} } { { "../../../../../altera/81/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "C:/altera/81/quartus/libraries/megafunctions/sld_hub.vhd" 987 -1 0 } } { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] } "NODE_NAME" } } } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
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