part6.map.rpt

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                    ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                    ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                    ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                    ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                    ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                    ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                    ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                    ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                    ;
; WIDTH_BYTEENA_A                    ; 1                    ; Signed Integer             ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                    ;
; RAM_BLOCK_TYPE                     ; M4K                  ; Untyped                    ;
; BYTE_SIZE                          ; 8                    ; Untyped                    ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                    ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                    ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                    ;
; INIT_FILE                          ; myram.mif            ; Untyped                    ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                    ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                    ;
; CLOCK_ENABLE_INPUT_A               ; BYPASS               ; Untyped                    ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                    ;
; CLOCK_ENABLE_OUTPUT_A              ; BYPASS               ; Untyped                    ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                    ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                    ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                    ;
; ENABLE_ECC                         ; FALSE                ; Untyped                    ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                    ;
; CBXI_PARAMETER                     ; altsyncram_bvj1      ; Untyped                    ;
+------------------------------------+----------------------+----------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: myram:Ram|altsyncram:altsyncram_component|altsyncram_bvj1:auto_generated|sld_mod_ram_rom:mgl_prim2 ;
+-------------------------+------------+----------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value      ; Type                                                                                                     ;
+-------------------------+------------+----------------------------------------------------------------------------------------------------------+
; SLD_NODE_INFO           ; 135818752  ; Signed Integer                                                                                           ;
; SLD_AUTO_INSTANCE_INDEX ; yes        ; String                                                                                                   ;
; SLD_IP_VERSION          ; 1          ; Signed Integer                                                                                           ;
; SLD_IP_MINOR_VERSION    ; 3          ; Signed Integer                                                                                           ;
; SLD_COMMON_IP_VERSION   ; 0          ; Signed Integer                                                                                           ;
; width_word              ; 8          ; Untyped                                                                                                  ;
; numwords                ; 32         ; Untyped                                                                                                  ;
; widthad                 ; 5          ; Untyped                                                                                                  ;
; shift_count_bits        ; 4          ; Untyped                                                                                                  ;
; cvalue                  ; 00000000   ; Untyped                                                                                                  ;
; is_data_in_ram          ; 1          ; Untyped                                                                                                  ;
; is_readable             ; 1          ; Untyped                                                                                                  ;
; node_name               ; 1380011264 ; Untyped                                                                                                  ;
+-------------------------+------------+----------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sld_hub:sld_hub_inst         ;
+--------------------------+----------------------------------+-----------------+
; Parameter Name           ; Value                            ; Type            ;
+--------------------------+----------------------------------+-----------------+
; sld_hub_ip_version       ; 1                                ; Untyped         ;
; sld_hub_ip_minor_version ; 4                                ; Untyped         ;
; sld_common_ip_version    ; 0                                ; Untyped         ;
; device_family            ; Cyclone II                       ; Untyped         ;
; n_nodes                  ; 1                                ; Untyped         ;
; n_sel_bits               ; 1                                ; Untyped         ;
; n_node_ir_bits           ; 5                                ; Untyped         ;
; node_info                ; 00001000000110000110111000000000 ; Unsigned Binary ;
; compilation_mode         ; 1                                ; Untyped         ;
; BROADCAST_FEATURE        ; 1                                ; Signed Integer  ;
; FORCE_IR_CAPTURE_FEATURE ; 1                                ; Signed Integer  ;
+--------------------------+----------------------------------+-----------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------+
; In-System Memory Content Editor Settings                                                                                             ;
+----------------+-------------+-------+-------+------------+--------------------------------------------------------------------------+
; Instance Index ; Instance ID ; Width ; Depth ; Mode       ; Hierarchy Location                                                       ;
+----------------+-------------+-------+-------+------------+--------------------------------------------------------------------------+
; 0              ; RAM         ; 8     ; 32    ; Read/Write ; myram:Ram|altsyncram:altsyncram_component|altsyncram_bvj1:auto_generated ;
+----------------+-------------+-------+-------+------------+--------------------------------------------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition
    Info: Processing started: Fri May 15 12:00:37 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off part6 -c part6
Info: Found 4 design units, including 4 entities, in source file part6.v
    Info: Found entity 1: part6
    Info: Found entity 2: myram
    Info: Found entity 3: count
    Info: Found entity 4: display
Info: Elaborating entity "part6" for the top level hierarchy
Warning (10230): Verilog HDL assignment warning at part6.v(19): truncated value with size 32 to match size of target (3)
Warning (10230): Verilog HDL assignment warning at part6.v(20): truncated value with size 32 to match size of target (11)
Warning (10230): Verilog HDL assignment warning at part6.v(22): truncated value with size 32 to match size of target (11)
Warning (10230): Verilog HDL assignment warning at part6.v(25): truncated value with size 32 to match size of target (1)
Warning (10235): Verilog HDL Always Construct warning at part6.v(36): variable "Count_v" is read inside the Always Construct but isn't in the Always Construct's Event Control
Info: Elaborating entity "count" for hierarchy "count:Cnt"
Info: Elaborating entity "myram" for hierarchy "myram:Ram"
Info: Elaborating entity "altsyncram" for hierarchy "myram:Ram|altsyncram:altsyncram_component"
Info: Elaborated megafunction instantiation "myram:Ram|altsyncram:altsyncram_component"
Info: Instantiated megafunction "myram:Ram|altsyncram:altsyncram_component" with the following paramete