part6_modelsim.xrf

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

instance = comp, \~QIC_CREATED_GND~I , ~QIC_CREATED_GND~I, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~70 , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~70, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~72 , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~72, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~74 , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~74, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|process_0~97 , Ram|altsyncram_component|auto_generated|mgl_prim2|process_0~97, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2] , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~76 , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~76, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~78 , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~78, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4] , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3] , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3]~feeder , Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3]~feeder, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|process_0~5 , Ram|altsyncram_component|auto_generated|mgl_prim2|process_0~5, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|process_0~5clkctrl , Ram|altsyncram_component|auto_generated|mgl_prim2|process_0~5clkctrl, part6, 1
instance = comp, \sld_hub_inst|node_ena_proc~1 , sld_hub_inst|node_ena_proc~1, part6, 1
instance = comp, \sld_hub_inst|Equal0~84 , sld_hub_inst|Equal0~84, part6, 1
instance = comp, \sld_hub_inst|Equal0~83 , sld_hub_inst|Equal0~83, part6, 1
instance = comp, \sld_hub_inst|Equal0~85 , sld_hub_inst|Equal0~85, part6, 1
instance = comp, \sld_hub_inst|shadow_jsm|state[0]~clkctrl , sld_hub_inst|shadow_jsm|state[0]~clkctrl, part6, 1
instance = comp, \sld_hub_inst|virtual_dr_scan_reg , sld_hub_inst|virtual_dr_scan_reg, part6, 1
instance = comp, \sld_hub_inst|node_ena~687 , sld_hub_inst|node_ena~687, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[1]~463 , sld_hub_inst|hub_mode_reg[1]~463, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[1]~461 , sld_hub_inst|hub_mode_reg[1]~461, part6, 1
instance = comp, \sld_hub_inst|Equal6~57 , sld_hub_inst|Equal6~57, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[1]~462 , sld_hub_inst|hub_mode_reg[1]~462, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[1]~464 , sld_hub_inst|hub_mode_reg[1]~464, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[1] , sld_hub_inst|hub_mode_reg[1], part6, 1
instance = comp, \sld_hub_inst|node_ena~686 , sld_hub_inst|node_ena~686, part6, 1
instance = comp, \sld_hub_inst|node_ena~688 , sld_hub_inst|node_ena~688, part6, 1
instance = comp, \sld_hub_inst|node_ena[1]~reg0 , sld_hub_inst|node_ena[1]~reg0, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|process_0~96 , Ram|altsyncram_component|auto_generated|mgl_prim2|process_0~96, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3] , Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3], part6, 1
instance = comp, \sld_hub_inst|irsr_reg~528 , sld_hub_inst|irsr_reg~528, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[0]~467 , sld_hub_inst|hub_mode_reg[0]~467, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[0] , sld_hub_inst|hub_mode_reg[0], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder , Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2] , Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2], part6, 1
instance = comp, \sld_hub_inst|irsr_reg[3]~524 , sld_hub_inst|irsr_reg[3]~524, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[3]~526 , sld_hub_inst|irsr_reg[3]~526, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[3]~527 , sld_hub_inst|irsr_reg[3]~527, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[3] , sld_hub_inst|irsr_reg[3], part6, 1
instance = comp, \sld_hub_inst|irsr_reg[2]~520 , sld_hub_inst|irsr_reg[2]~520, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[0]~521 , sld_hub_inst|irsr_reg[0]~521, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[4] , sld_hub_inst|irsr_reg[4], part6, 1
instance = comp, \sld_hub_inst|irf_reg~274 , sld_hub_inst|irf_reg~274, part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][0]~268 , sld_hub_inst|irf_reg[1][0]~268, part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][0]~269 , sld_hub_inst|irf_reg[1][0]~269, part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][0]~270 , sld_hub_inst|irf_reg[1][0]~270, part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][4] , sld_hub_inst|irf_reg[1][4], part6, 1
instance = comp, \sld_hub_inst|clr_reg~_wirecell , sld_hub_inst|clr_reg~_wirecell, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~29 , Ram|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~29, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg , Ram|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg, part6, 1
instance = comp, \sld_hub_inst|irsr_reg~522 , sld_hub_inst|irsr_reg~522, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[0] , sld_hub_inst|irsr_reg[0], part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg~265 , sld_hub_inst|shadow_irf_reg~265, part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg[1][0]~266 , sld_hub_inst|shadow_irf_reg[1][0]~266, part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg[1][0]~267 , sld_hub_inst|shadow_irf_reg[1][0]~267, part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg[1][0] , sld_hub_inst|shadow_irf_reg[1][0], part6, 1
instance = comp, \sld_hub_inst|irf_reg~267 , sld_hub_inst|irf_reg~267, part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][0] , sld_hub_inst|irf_reg[1][0], part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][0]~clkctrl , sld_hub_inst|irf_reg[1][0]~clkctrl, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0] , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0]~feeder , Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0]~feeder, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0] , Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0], part6, 1
instance = comp, \sld_hub_inst|irsr_reg~519 , sld_hub_inst|irsr_reg~519, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[1] , sld_hub_inst|irsr_reg[1], part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg~465 , sld_hub_inst|hub_mode_reg~465, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[2]~0 , sld_hub_inst|hub_mode_reg[2]~0, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[2]~466 , sld_hub_inst|hub_mode_reg[2]~466, part6, 1
instance = comp, \sld_hub_inst|hub_mode_reg[2] , sld_hub_inst|hub_mode_reg[2], part6, 1
instance = comp, \sld_hub_inst|clr_reg_proc~0 , sld_hub_inst|clr_reg_proc~0, part6, 1
instance = comp, \sld_hub_inst|clr_reg , sld_hub_inst|clr_reg, part6, 1
instance = comp, \sld_hub_inst|clr_reg~clkctrl , sld_hub_inst|clr_reg~clkctrl, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[5] , sld_hub_inst|irsr_reg[5], part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg~270 , sld_hub_inst|shadow_irf_reg~270, part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg[1][3] , sld_hub_inst|shadow_irf_reg[1][3], part6, 1
instance = comp, \sld_hub_inst|irf_reg~273 , sld_hub_inst|irf_reg~273, part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][3] , sld_hub_inst|irf_reg[1][3], part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][3]~clkctrl , sld_hub_inst|irf_reg[1][3]~clkctrl, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|Equal1~33 , Ram|altsyncram_component|auto_generated|mgl_prim2|Equal1~33, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~48 , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~48, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|Equal1~32 , Ram|altsyncram_component|auto_generated|mgl_prim2|Equal1~32, part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg~269 , sld_hub_inst|shadow_irf_reg~269, part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg[1][2] , sld_hub_inst|shadow_irf_reg[1][2], part6, 1
instance = comp, \sld_hub_inst|irf_reg~272 , sld_hub_inst|irf_reg~272, part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][2] , sld_hub_inst|irf_reg[1][2], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~16 , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~16, part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg~268 , sld_hub_inst|shadow_irf_reg~268, part6, 1
instance = comp, \sld_hub_inst|shadow_irf_reg[1][1] , sld_hub_inst|shadow_irf_reg[1][1], part6, 1
instance = comp, \sld_hub_inst|irf_reg~271 , sld_hub_inst|irf_reg~271, part6, 1
instance = comp, \sld_hub_inst|irf_reg[1][1] , sld_hub_inst|irf_reg[1][1], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1] , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder , Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1] , Ram|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1], part6, 1
instance = comp, \sld_hub_inst|irsr_reg~523 , sld_hub_inst|irsr_reg~523, part6, 1
instance = comp, \sld_hub_inst|irsr_reg[2] , sld_hub_inst|irsr_reg[2], part6, 1
instance = comp, \sld_hub_inst|Equal6~56 , sld_hub_inst|Equal6~56, part6, 1
instance = comp, \sld_hub_inst|tdo~424 , sld_hub_inst|tdo~424, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~215 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~215, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~223 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~223, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~225 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~225, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~218 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~218, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4] , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1718 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1718, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~219 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~219, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1] , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1725 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1725, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~217 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~217, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~221 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~221, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2] , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3] , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1723 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1723, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1726 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1726, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1732 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1732, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1727 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1727, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~15 , Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~15, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0]~1722 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0]~1722, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2] , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1724 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1724, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1731 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1731, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1] , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1721 , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1721, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] , Ram|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0], part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~56 , Ram|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~56, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out , Ram|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|tdo~200 , Ram|altsyncram_component|auto_generated|mgl_prim2|tdo~200, part6, 1
instance = comp, \Ram|altsyncram_component|auto_generated|mgl_prim2|tdo~201 , Ram|altsyncram_component|auto_generated|mgl_prim2|tdo~201, part6, 1
instance = comp, \sld_hub_inst|tdo~425 , sld_hub_inst|tdo~425, part6, 1
instance = comp, \sld_hub_inst|tdo~426 , sld_hub_inst|tdo~426, part6, 1
instance = comp, \sld_hub_inst|tdo , sld_hub_inst|tdo, part6, 1