part4.vo

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

	.modesel(4'b1001),
	.combout(\SEG_DATA~3651_combout ),
	.cout(),
	.pathsel(8'b00001100));
// synopsys translate_off
// defparam \SEG_DATA~3651 .lut_mask = 16'h000F;
// defparam \SEG_DATA~3651 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X7_Y34_N0
cycloneii_lcell_comb \Dis2|out[0]~806 (
// Equation(s):
// \Dis2|out[0]~806_combout  = \SRAM_data[6]~25  & (\SRAM_data[5]~26  # \SRAM_data[4]~27  & !\SRAM_data[7]~24 ) # !\SRAM_data[6]~25  & (\SRAM_data[7]~24  $ \SRAM_data[5]~26  # !\SRAM_data[4]~27 )

	.dataa(\SRAM_data[4]~27 ),
	.datab(\SRAM_data[6]~25 ),
	.datac(\SRAM_data[7]~24 ),
	.datad(\SRAM_data[5]~26 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis2|out[0]~806_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis2|out[0]~806 .lut_mask = 16'hDF39;
// defparam \Dis2|out[0]~806 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N26
cycloneii_lcell_comb \Dis3|out[0]~806 (
// Equation(s):
// \Dis3|out[0]~806_combout  = \SRAM_data[9]~22  & (\SRAM_data[10]~21  # !\SRAM_data[8]~23  # !\SRAM_data[11]~20 ) # !\SRAM_data[9]~22  & (\SRAM_data[10]~21  $ (\SRAM_data[11]~20  # !\SRAM_data[8]~23 ))

	.dataa(\SRAM_data[11]~20 ),
	.datab(\SRAM_data[9]~22 ),
	.datac(\SRAM_data[8]~23 ),
	.datad(\SRAM_data[10]~21 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis3|out[0]~806_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis3|out[0]~806 .lut_mask = 16'hDC6F;
// defparam \Dis3|out[0]~806 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N28
cycloneii_lcell_comb \SEG_DATA~3652 (
// Equation(s):
// \SEG_DATA~3652_combout  = \cnt[1]~regout  & (\Dis3|out[0]~806_combout  # \cnt[0]~regout ) # !\cnt[1]~regout  & \Dis1|out[0]~484_combout  & (!\cnt[0]~regout )

	.dataa(\Dis1|out[0]~484_combout ),
	.datab(\Dis3|out[0]~806_combout ),
	.datac(\cnt[1]~regout ),
	.datad(\cnt[0]~regout ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3652_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3652 .lut_mask = 16'hF0CA;
// defparam \SEG_DATA~3652 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N16
cycloneii_lcell_comb \Dis4|out[0]~806 (
// Equation(s):
// \Dis4|out[0]~806_combout  = \SRAM_data[13]~18  & (\SRAM_data[14]~17  # !\SRAM_data[12]~19  # !\SRAM_data[15]~16 ) # !\SRAM_data[13]~18  & (\SRAM_data[14]~17  $ (\SRAM_data[15]~16  # !\SRAM_data[12]~19 ))

	.dataa(\SRAM_data[15]~16 ),
	.datab(\SRAM_data[13]~18 ),
	.datac(\SRAM_data[12]~19 ),
	.datad(\SRAM_data[14]~17 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis4|out[0]~806_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis4|out[0]~806 .lut_mask = 16'hDC6F;
// defparam \Dis4|out[0]~806 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N6
cycloneii_lcell_comb \SEG_DATA~3653 (
// Equation(s):
// \SEG_DATA~3653_combout  = \SEG_DATA~3652_combout  & (\Dis4|out[0]~806_combout  # !\cnt[0]~regout ) # !\SEG_DATA~3652_combout  & \Dis2|out[0]~806_combout  & (\cnt[0]~regout )

	.dataa(\Dis2|out[0]~806_combout ),
	.datab(\SEG_DATA~3652_combout ),
	.datac(\Dis4|out[0]~806_combout ),
	.datad(\cnt[0]~regout ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3653_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3653 .lut_mask = 16'hE2CC;
// defparam \SEG_DATA~3653 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N28
cycloneii_lcell_comb \Dis3|out[1]~807 (
// Equation(s):
// \Dis3|out[1]~807_combout  = \SRAM_data[10]~21  & (\SRAM_data[11]~20  $ \SRAM_data[9]~22  $ !\SRAM_data[8]~23 ) # !\SRAM_data[10]~21  & (!\SRAM_data[8]~23  # !\SRAM_data[9]~22  # !\SRAM_data[11]~20 )

	.dataa(\SRAM_data[11]~20 ),
	.datab(\SRAM_data[9]~22 ),
	.datac(\SRAM_data[8]~23 ),
	.datad(\SRAM_data[10]~21 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis3|out[1]~807_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis3|out[1]~807 .lut_mask = 16'h697F;
// defparam \Dis3|out[1]~807 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N6
cycloneii_lcell_comb \SEG_DATA~3656 (
// Equation(s):
// \SEG_DATA~3656_combout  = \Equal1~103_combout  & (\Dis3|out[1]~807_combout  # !\SRAM_data[11]~20  & !\SRAM_data[10]~21 )

	.dataa(\SRAM_data[11]~20 ),
	.datab(\Dis3|out[1]~807_combout ),
	.datac(\Equal1~103_combout ),
	.datad(\SRAM_data[10]~21 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3656_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3656 .lut_mask = 16'hC0D0;
// defparam \SEG_DATA~3656 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X7_Y34_N26
cycloneii_lcell_comb \SEG_DATA~3658 (
// Equation(s):
// \SEG_DATA~3658_combout  = \Equal1~104_combout  & (\Dis2|out[1]~807_combout  # !\SRAM_data[6]~25  & !\SRAM_data[7]~24 )

	.dataa(\Dis2|out[1]~807_combout ),
	.datab(\SRAM_data[6]~25 ),
	.datac(\Equal1~104_combout ),
	.datad(\SRAM_data[7]~24 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3658_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3658 .lut_mask = 16'hA0B0;
// defparam \SEG_DATA~3658 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X7_Y34_N4
cycloneii_lcell_comb \SEG_DATA~3654 (
// Equation(s):
// \SEG_DATA~3654_combout  = \SRAM_data[2]~29  & (\SRAM_data[3]~28  $ \SRAM_data[0]~31  $ !\SRAM_data[1]~30 ) # !\SRAM_data[2]~29  & (!\SRAM_data[1]~30  # !\SRAM_data[0]~31  # !\SRAM_data[3]~28 )

	.dataa(\SRAM_data[3]~28 ),
	.datab(\SRAM_data[0]~31 ),
	.datac(\SRAM_data[1]~30 ),
	.datad(\SRAM_data[2]~29 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3654_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3654 .lut_mask = 16'h697F;
// defparam \SEG_DATA~3654 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X7_Y34_N22
cycloneii_lcell_comb \SEG_DATA~3655 (
// Equation(s):
// \SEG_DATA~3655_combout  = \SEG_DATA~3651_combout  & (\SEG_DATA~3654_combout  # !\SRAM_data[3]~28  & !\SRAM_data[2]~29 )

	.dataa(\SEG_DATA~3651_combout ),
	.datab(\SEG_DATA~3654_combout ),
	.datac(\SRAM_data[3]~28 ),
	.datad(\SRAM_data[2]~29 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3655_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3655 .lut_mask = 16'h888A;
// defparam \SEG_DATA~3655 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N8
cycloneii_lcell_comb \Dis4|out[1]~807 (
// Equation(s):
// \Dis4|out[1]~807_combout  = \SRAM_data[14]~17  & (\SRAM_data[15]~16  $ \SRAM_data[13]~18  $ !\SRAM_data[12]~19 ) # !\SRAM_data[14]~17  & (!\SRAM_data[12]~19  # !\SRAM_data[13]~18  # !\SRAM_data[15]~16 )

	.dataa(\SRAM_data[15]~16 ),
	.datab(\SRAM_data[13]~18 ),
	.datac(\SRAM_data[12]~19 ),
	.datad(\SRAM_data[14]~17 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis4|out[1]~807_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis4|out[1]~807 .lut_mask = 16'h697F;
// defparam \Dis4|out[1]~807 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N10
cycloneii_lcell_comb \SEG_DATA~3657 (
// Equation(s):
// \SEG_DATA~3657_combout  = \Equal1~102_combout  & (\Dis4|out[1]~807_combout  # !\SRAM_data[15]~16  & !\SRAM_data[14]~17 )

	.dataa(\Equal1~102_combout ),
	.datab(\Dis4|out[1]~807_combout ),
	.datac(\SRAM_data[15]~16 ),
	.datad(\SRAM_data[14]~17 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3657_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3657 .lut_mask = 16'h888A;
// defparam \SEG_DATA~3657 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N20
cycloneii_lcell_comb \SEG_DATA~3659 (
// Equation(s):
// \SEG_DATA~3659_combout  = \SEG_DATA~3656_combout  # \SEG_DATA~3658_combout  # \SEG_DATA~3655_combout  # \SEG_DATA~3657_combout 

	.dataa(\SEG_DATA~3656_combout ),
	.datab(\SEG_DATA~3658_combout ),
	.datac(\SEG_DATA~3655_combout ),
	.datad(\SEG_DATA~3657_combout ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3659_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3659 .lut_mask = 16'hFFFE;
// defparam \SEG_DATA~3659 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X7_Y34_N20
cycloneii_lcell_comb \Dis1|out[2]~485 (
// Equation(s):
// \Dis1|out[2]~485_combout  = \SRAM_data[3]~28  & \SRAM_data[2]~29  & (\SRAM_data[1]~30  # !\SRAM_data[0]~31 ) # !\SRAM_data[3]~28  & !\SRAM_data[0]~31  & \SRAM_data[1]~30  & !\SRAM_data[2]~29 

	.dataa(\SRAM_data[3]~28 ),
	.datab(\SRAM_data[0]~31 ),
	.datac(\SRAM_data[1]~30 ),
	.datad(\SRAM_data[2]~29 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis1|out[2]~485_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis1|out[2]~485 .lut_mask = 16'hA210;
// defparam \Dis1|out[2]~485 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N30
cycloneii_lcell_comb \Dis3|out[2]~808 (
// Equation(s):
// \Dis3|out[2]~808_combout  = \SRAM_data[11]~20  & \SRAM_data[10]~21  & (\SRAM_data[9]~22  # !\SRAM_data[8]~23 ) # !\SRAM_data[11]~20  & \SRAM_data[9]~22  & !\SRAM_data[8]~23  & !\SRAM_data[10]~21 

	.dataa(\SRAM_data[11]~20 ),
	.datab(\SRAM_data[9]~22 ),
	.datac(\SRAM_data[8]~23 ),
	.datad(\SRAM_data[10]~21 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis3|out[2]~808_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis3|out[2]~808 .lut_mask = 16'h8A04;
// defparam \Dis3|out[2]~808 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X7_Y34_N6
cycloneii_lcell_comb \Dis2|out[2]~808 (
// Equation(s):
// \Dis2|out[2]~808_combout  = \SRAM_data[6]~25  & \SRAM_data[7]~24  & (\SRAM_data[5]~26  # !\SRAM_data[4]~27 ) # !\SRAM_data[6]~25  & !\SRAM_data[4]~27  & !\SRAM_data[7]~24  & \SRAM_data[5]~26 

	.dataa(\SRAM_data[4]~27 ),
	.datab(\SRAM_data[6]~25 ),
	.datac(\SRAM_data[7]~24 ),
	.datad(\SRAM_data[5]~26 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis2|out[2]~808_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis2|out[2]~808 .lut_mask = 16'hC140;
// defparam \Dis2|out[2]~808 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N24
cycloneii_lcell_comb \Dis4|out[2]~808 (
// Equation(s):
// \Dis4|out[2]~808_combout  = \SRAM_data[15]~16  & \SRAM_data[14]~17  & (\SRAM_data[13]~18  # !\SRAM_data[12]~19 ) # !\SRAM_data[15]~16  & \SRAM_data[13]~18  & !\SRAM_data[12]~19  & !\SRAM_data[14]~17 

	.dataa(\SRAM_data[15]~16 ),
	.datab(\SRAM_data[13]~18 ),
	.datac(\SRAM_data[12]~19 ),
	.datad(\SRAM_data[14]~17 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis4|out[2]~808_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis4|out[2]~808 .lut_mask = 16'h8A04;
// defparam \Dis4|out[2]~808 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N24
cycloneii_lcell_comb \SEG_DATA~3660 (
// Equation(s):
// \SEG_DATA~3660_combout  = \cnt[0]~regout  & (\cnt[1]~regout  & (\Dis4|out[2]~808_combout ) # !\cnt[1]~regout  & \Dis2|out[2]~808_combout ) # !\cnt[0]~regout  & (\cnt[1]~regout )

	.dataa(\cnt[0]~regout ),
	.datab(\Dis2|out[2]~808_combout ),
	.datac(\cnt[1]~regout ),
	.datad(\Dis4|out[2]~808_combout ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3660_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3660 .lut_mask = 16'hF858;
// defparam \SEG_DATA~3660 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N18
cycloneii_lcell_comb \SEG_DATA~3661 (
// Equation(s):
// \SEG_DATA~3661_combout  = \SEG_DATA~3660_combout  & (!\Dis3|out[2]~808_combout  & !\cnt[0]~regout ) # !\SEG_DATA~3660_combout  & (\cnt[0]~regout  # !\Dis1|out[2]~485_combout )

	.dataa(\Dis1|out[2]~485_combout ),
	.datab(\Dis3|out[2]~808_combout ),
	.datac(\SEG_DATA~3660_combout ),
	.datad(\cnt[0]~regout ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\SEG_DATA~3661_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \SEG_DATA~3661 .lut_mask = 16'h0F35;
// defparam \SEG_DATA~3661 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X7_Y34_N16
cycloneii_lcell_comb \Dis2|out[3]~809 (
// Equation(s):
// \Dis2|out[3]~809_combout  = \SRAM_data[5]~26  & (!\SRAM_data[6]~25  # !\SRAM_data[4]~27 ) # !\SRAM_data[5]~26  & (\SRAM_data[7]~24  # \SRAM_data[4]~27  $ !\SRAM_data[6]~25 )

	.dataa(\SRAM_data[4]~27 ),
	.datab(\SRAM_data[6]~25 ),
	.datac(\SRAM_data[7]~24 ),
	.datad(\SRAM_data[5]~26 ),
	.cin(gnd),
	.modesel(4'b1001),
	.combout(\Dis2|out[3]~809_combout ),
	.cout(),
	.pathsel(8'b00001111));
// synopsys translate_off
// defparam \Dis2|out[3]~809 .lut_mask = 16'h77F9;
// defparam \Dis2|out[3]~809 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X10_Y34_N8
cycloneii_lcell_comb \Dis3|out[3]~809 (
// Equation(s):
// \Dis3|out[3]~809_combout  = \SRAM_data[9]~22  & (!\SRAM_data[10]~21  # !\SRAM_data[8]~23 ) # !\SRAM_data[9]~22  & (\SRAM_data[11]~20  # \SRAM_data[8]~23  $ !\SRAM_data[10]~21 )

	.dataa(\SRAM_data[11]~20 ),