part4.vo

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Address~combout [1]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Address[1]));
// synopsys translate_off
defparam \Address[1]~I .input_async_reset = "none";
defparam \Address[1]~I .input_power_up = "low";
defparam \Address[1]~I .input_register_mode = "none";
defparam \Address[1]~I .input_sync_reset = "none";
defparam \Address[1]~I .oe_async_reset = "none";
defparam \Address[1]~I .oe_power_up = "low";
defparam \Address[1]~I .oe_register_mode = "none";
defparam \Address[1]~I .oe_sync_reset = "none";
defparam \Address[1]~I .operation_mode = "input";
defparam \Address[1]~I .output_async_reset = "none";
defparam \Address[1]~I .output_power_up = "low";
defparam \Address[1]~I .output_register_mode = "none";
defparam \Address[1]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AA12
cycloneii_io \Address[2]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Address~combout [2]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Address[2]));
// synopsys translate_off
defparam \Address[2]~I .input_async_reset = "none";
defparam \Address[2]~I .input_power_up = "low";
defparam \Address[2]~I .input_register_mode = "none";
defparam \Address[2]~I .input_sync_reset = "none";
defparam \Address[2]~I .oe_async_reset = "none";
defparam \Address[2]~I .oe_power_up = "low";
defparam \Address[2]~I .oe_register_mode = "none";
defparam \Address[2]~I .oe_sync_reset = "none";
defparam \Address[2]~I .operation_mode = "input";
defparam \Address[2]~I .output_async_reset = "none";
defparam \Address[2]~I .output_power_up = "low";
defparam \Address[2]~I .output_register_mode = "none";
defparam \Address[2]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AD12
cycloneii_io \Address[3]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Address~combout [3]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Address[3]));
// synopsys translate_off
defparam \Address[3]~I .input_async_reset = "none";
defparam \Address[3]~I .input_power_up = "low";
defparam \Address[3]~I .input_register_mode = "none";
defparam \Address[3]~I .input_sync_reset = "none";
defparam \Address[3]~I .oe_async_reset = "none";
defparam \Address[3]~I .oe_power_up = "low";
defparam \Address[3]~I .oe_register_mode = "none";
defparam \Address[3]~I .oe_sync_reset = "none";
defparam \Address[3]~I .operation_mode = "input";
defparam \Address[3]~I .output_async_reset = "none";
defparam \Address[3]~I .output_power_up = "low";
defparam \Address[3]~I .output_register_mode = "none";
defparam \Address[3]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AC12
cycloneii_io \Address[4]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Address~combout [4]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Address[4]));
// synopsys translate_off
defparam \Address[4]~I .input_async_reset = "none";
defparam \Address[4]~I .input_power_up = "low";
defparam \Address[4]~I .input_register_mode = "none";
defparam \Address[4]~I .input_sync_reset = "none";
defparam \Address[4]~I .oe_async_reset = "none";
defparam \Address[4]~I .oe_power_up = "low";
defparam \Address[4]~I .oe_register_mode = "none";
defparam \Address[4]~I .oe_sync_reset = "none";
defparam \Address[4]~I .operation_mode = "input";
defparam \Address[4]~I .output_async_reset = "none";
defparam \Address[4]~I .output_power_up = "low";
defparam \Address[4]~I .output_register_mode = "none";
defparam \Address[4]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_U12
cycloneii_io \Address[5]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Address~combout [5]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Address[5]));
// synopsys translate_off
defparam \Address[5]~I .input_async_reset = "none";
defparam \Address[5]~I .input_power_up = "low";
defparam \Address[5]~I .input_register_mode = "none";
defparam \Address[5]~I .input_sync_reset = "none";
defparam \Address[5]~I .oe_async_reset = "none";
defparam \Address[5]~I .oe_power_up = "low";
defparam \Address[5]~I .oe_register_mode = "none";
defparam \Address[5]~I .oe_sync_reset = "none";
defparam \Address[5]~I .operation_mode = "input";
defparam \Address[5]~I .output_async_reset = "none";
defparam \Address[5]~I .output_power_up = "low";
defparam \Address[5]~I .output_register_mode = "none";
defparam \Address[5]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_AE11
cycloneii_io \Address[6]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Address~combout [6]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Address[6]));
// synopsys translate_off
defparam \Address[6]~I .input_async_reset = "none";
defparam \Address[6]~I .input_power_up = "low";
defparam \Address[6]~I .input_register_mode = "none";
defparam \Address[6]~I .input_sync_reset = "none";
defparam \Address[6]~I .oe_async_reset = "none";
defparam \Address[6]~I .oe_power_up = "low";
defparam \Address[6]~I .oe_register_mode = "none";
defparam \Address[6]~I .oe_sync_reset = "none";
defparam \Address[6]~I .operation_mode = "input";
defparam \Address[6]~I .output_async_reset = "none";
defparam \Address[6]~I .output_power_up = "low";
defparam \Address[6]~I .output_register_mode = "none";
defparam \Address[6]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_Y12
cycloneii_io \Address[7]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\Address~combout [7]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(Address[7]));
// synopsys translate_off
defparam \Address[7]~I .input_async_reset = "none";
defparam \Address[7]~I .input_power_up = "low";
defparam \Address[7]~I .input_register_mode = "none";
defparam \Address[7]~I .input_sync_reset = "none";
defparam \Address[7]~I .oe_async_reset = "none";
defparam \Address[7]~I .oe_power_up = "low";
defparam \Address[7]~I .oe_register_mode = "none";
defparam \Address[7]~I .oe_sync_reset = "none";
defparam \Address[7]~I .operation_mode = "input";
defparam \Address[7]~I .output_async_reset = "none";
defparam \Address[7]~I .output_power_up = "low";
defparam \Address[7]~I .output_register_mode = "none";
defparam \Address[7]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N10
cycloneii_lcell_comb \cnt[0]~7 (
// Equation(s):
// \cnt[0]~7_combout  = !cnt[0]

	.dataa(vcc),
	.datab(vcc),
	.datac(cnt[0]),
	.datad(vcc),
	.cin(gnd),
	.combout(\cnt[0]~7_combout ),
	.cout());
// synopsys translate_off
defparam \cnt[0]~7 .lut_mask = 16'h0F0F;
defparam \cnt[0]~7 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X8_Y34_N11
cycloneii_lcell_ff \cnt[0] (
	.clk(\CLK~clkctrl_outclk ),
	.datain(\cnt[0]~7_combout ),
	.sdata(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(cnt[0]));

// atom is at LCCOMB_X8_Y34_N16
cycloneii_lcell_comb \cnt[1]~6 (
// Equation(s):
// \cnt[1]~6_combout  = cnt[1] $ cnt[0]

	.dataa(vcc),
	.datab(vcc),
	.datac(cnt[1]),
	.datad(cnt[0]),
	.cin(gnd),
	.combout(\cnt[1]~6_combout ),
	.cout());
// synopsys translate_off
defparam \cnt[1]~6 .lut_mask = 16'h0FF0;
defparam \cnt[1]~6 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X8_Y34_N17
cycloneii_lcell_ff \cnt[1] (
	.clk(\CLK~clkctrl_outclk ),
	.datain(\cnt[1]~6_combout ),
	.sdata(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(cnt[1]));

// atom is at LCCOMB_X8_Y34_N20
cycloneii_lcell_comb \Equal1~102 (
// Equation(s):
// \Equal1~102_combout  = cnt[1] & cnt[0]

	.dataa(vcc),
	.datab(vcc),
	.datac(cnt[1]),
	.datad(cnt[0]),
	.cin(gnd),
	.combout(\Equal1~102_combout ),
	.cout());
// synopsys translate_off
defparam \Equal1~102 .lut_mask = 16'hF000;
defparam \Equal1~102 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N14
cycloneii_lcell_comb \Equal1~103 (
// Equation(s):
// \Equal1~103_combout  = cnt[1] & !cnt[0]

	.dataa(vcc),
	.datab(vcc),
	.datac(cnt[1]),
	.datad(cnt[0]),
	.cin(gnd),
	.combout(\Equal1~103_combout ),
	.cout());
// synopsys translate_off
defparam \Equal1~103 .lut_mask = 16'h00F0;
defparam \Equal1~103 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N0
cycloneii_lcell_comb \Equal1~104 (
// Equation(s):
// \Equal1~104_combout  = !cnt[1] & cnt[0]

	.dataa(vcc),
	.datab(vcc),
	.datac(cnt[1]),
	.datad(cnt[0]),
	.cin(gnd),
	.combout(\Equal1~104_combout ),
	.cout());
// synopsys translate_off
defparam \Equal1~104 .lut_mask = 16'h0F00;
defparam \Equal1~104 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N2
cycloneii_lcell_comb \SEG_DATA~3651 (
// Equation(s):
// \SEG_DATA~3651_combout  = !cnt[1] & !cnt[0]

	.dataa(vcc),
	.datab(vcc),
	.datac(cnt[1]),
	.datad(cnt[0]),
	.cin(gnd),
	.combout(\SEG_DATA~3651_combout ),
	.cout());
// synopsys translate_off
defparam \SEG_DATA~3651 .lut_mask = 16'h000F;
defparam \SEG_DATA~3651 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X7_Y34_N0
cycloneii_lcell_comb \Dis2|out[0]~806 (
// Equation(s):
// \Dis2|out[0]~806_combout  = \SRAM_data[6]~25  & (\SRAM_data[5]~26  # \SRAM_data[4]~27  & !\SRAM_data[7]~24 ) # !\SRAM_data[6]~25  & (\SRAM_data[7]~24  $ \SRAM_data[5]~26  # !\SRAM_data[4]~27 )

	.dataa(\SRAM_data[4]~27 ),
	.datab(\SRAM_data[6]~25 ),
	.datac(\SRAM_data[7]~24 ),
	.datad(\SRAM_data[5]~26 ),
	.cin(gnd),
	.combout(\Dis2|out[0]~806_combout ),
	.cout());
// synopsys translate_off
defparam \Dis2|out[0]~806 .lut_mask = 16'hDF39;
defparam \Dis2|out[0]~806 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X9_Y34_N26
cycloneii_lcell_comb \Dis3|out[0]~806 (
// Equation(s):
// \Dis3|out[0]~806_combout  = \SRAM_data[9]~22  & (\SRAM_data[10]~21  # !\SRAM_data[8]~23  # !\SRAM_data[11]~20 ) # !\SRAM_data[9]~22  & (\SRAM_data[10]~21  $ (\SRAM_data[11]~20  # !\SRAM_data[8]~23 ))

	.dataa(\SRAM_data[11]~20 ),
	.datab(\SRAM_data[9]~22 ),
	.datac(\SRAM_data[8]~23 ),
	.datad(\SRAM_data[10]~21 ),
	.cin(gnd),
	.combout(\Dis3|out[0]~806_combout ),
	.cout());
// synopsys translate_off
defparam \Dis3|out[0]~806 .lut_mask = 16'hDC6F;
defparam \Dis3|out[0]~806 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X8_Y34_N28
cycloneii_lcell_comb \SEG_DATA~3652 (
// Equation(s):
// \SEG_DATA~3652_combout  = cnt[1] & (\Dis3|out[0]~806_combout  # cnt[0]) # !cnt[1] & \Dis1|out[0]~484_combout  & (!cnt[0])

	.dataa(\Dis1|out[0]~484_combout ),
	.datab(\Dis3|out[0]~806_combout ),
	.datac(cnt[1]),
	.datad(cnt[0]),
	.cin(gnd),
	.combout(\SEG_DATA~3652_combout ),
	.cout());
// synopsys translate_off