part3_v.sdo

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EP2C35F672C6 Package FBGA672
// 

// 
// This SDF file should be used for ModelSim (Verilog) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "part3")
  (DATE "05/09/2008 19:48:48")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 7.2 Build 203 02/05/2008 Service Pack 2 SJ Web Edition")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~184)
    (DELAY
      (ABSOLUTE
        (PORT clk (1559:1559:1559) (1559:1559:1559))
        (PORT sdata (5718:5718:5718) (5718:5718:5718))
        (PORT ena (1623:1623:1623) (1623:1623:1623))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~56)
    (DELAY
      (ABSOLUTE
        (PORT clk (1559:1559:1559) (1559:1559:1559))
        (PORT sdata (5719:5719:5719) (5719:5719:5719))
        (PORT ena (1654:1654:1654) (1654:1654:1654))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE Ram\|memory_array\~8690)
    (DELAY
      (ABSOLUTE
        (PORT dataa (6128:6128:6128) (6128:6128:6128))
        (PORT datab (6016:6016:6016) (6016:6016:6016))
        (PORT datad (299:299:299) (299:299:299))
        (IOPATH dataa combout (438:438:438) (438:438:438))
        (IOPATH datab combout (420:420:420) (420:420:420))
        (IOPATH datac combout (323:323:323) (323:323:323))
        (IOPATH datad combout (150:150:150) (150:150:150))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~104)
    (DELAY
      (ABSOLUTE
        (PORT clk (1557:1557:1557) (1557:1557:1557))
        (PORT sdata (5727:5727:5727) (5727:5727:5727))
        (PORT ena (1310:1310:1310) (1310:1310:1310))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~168)
    (DELAY
      (ABSOLUTE
        (PORT clk (1561:1561:1561) (1561:1561:1561))
        (PORT sdata (6206:6206:6206) (6206:6206:6206))
        (PORT ena (1330:1330:1330) (1330:1330:1330))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~40)
    (DELAY
      (ABSOLUTE
        (PORT clk (1569:1569:1569) (1569:1569:1569))
        (PORT sdata (5996:5996:5996) (5996:5996:5996))
        (PORT ena (1358:1358:1358) (1358:1358:1358))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE Ram\|memory_array\~8694)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1018:1018:1018) (1018:1018:1018))
        (PORT datab (6389:6389:6389) (6389:6389:6389))
        (PORT datad (6521:6521:6521) (6521:6521:6521))
        (IOPATH dataa combout (438:438:438) (438:438:438))
        (IOPATH datab combout (419:419:419) (419:419:419))
        (IOPATH datac combout (323:323:323) (323:323:323))
        (IOPATH datad combout (150:150:150) (150:150:150))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~232)
    (DELAY
      (ABSOLUTE
        (PORT clk (1557:1557:1557) (1557:1557:1557))
        (PORT sdata (5732:5732:5732) (5732:5732:5732))
        (PORT ena (1307:1307:1307) (1307:1307:1307))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE Ram\|memory_array\~8695)
    (DELAY
      (ABSOLUTE
        (PORT dataa (455:455:455) (455:455:455))
        (PORT datab (6530:6530:6530) (6530:6530:6530))
        (PORT datad (305:305:305) (305:305:305))
        (IOPATH dataa combout (438:438:438) (438:438:438))
        (IOPATH datab combout (415:415:415) (415:415:415))
        (IOPATH datac combout (323:323:323) (323:323:323))
        (IOPATH datad combout (150:150:150) (150:150:150))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~440)
    (DELAY
      (ABSOLUTE
        (PORT clk (1553:1553:1553) (1553:1553:1553))
        (PORT sdata (5713:5713:5713) (5713:5713:5713))
        (PORT ena (1831:1831:1831) (1831:1831:1831))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~456)
    (DELAY
      (ABSOLUTE
        (PORT clk (1563:1563:1563) (1563:1563:1563))
        (PORT sdata (6002:6002:6002) (6002:6002:6002))
        (PORT ena (1597:1597:1597) (1597:1597:1597))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~424)
    (DELAY
      (ABSOLUTE
        (PORT clk (1563:1563:1563) (1563:1563:1563))
        (PORT sdata (6001:6001:6001) (6001:6001:6001))
        (PORT ena (1359:1359:1359) (1359:1359:1359))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE Ram\|memory_array\~8702)
    (DELAY
      (ABSOLUTE
        (PORT dataa (6445:6445:6445) (6445:6445:6445))
        (PORT datab (5842:5842:5842) (5842:5842:5842))
        (PORT datad (301:301:301) (301:301:301))
        (IOPATH dataa combout (438:438:438) (438:438:438))
        (IOPATH datab combout (420:420:420) (420:420:420))
        (IOPATH datac combout (323:323:323) (323:323:323))
        (IOPATH datad combout (150:150:150) (150:150:150))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~472)
    (DELAY
      (ABSOLUTE
        (PORT clk (1553:1553:1553) (1553:1553:1553))
        (PORT sdata (5713:5713:5713) (5713:5713:5713))
        (PORT ena (885:885:885) (885:885:885))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE Ram\|memory_array\~8703)
    (DELAY
      (ABSOLUTE
        (PORT dataa (688:688:688) (688:688:688))
        (PORT datab (5841:5841:5841) (5841:5841:5841))
        (PORT datad (308:308:308) (308:308:308))
        (IOPATH dataa combout (438:438:438) (438:438:438))
        (IOPATH datab combout (415:415:415) (415:415:415))
        (IOPATH datac combout (323:323:323) (323:323:323))
        (IOPATH datad combout (150:150:150) (150:150:150))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~328)
    (DELAY
      (ABSOLUTE
        (PORT clk (1556:1556:1556) (1556:1556:1556))
        (PORT sdata (5992:5992:5992) (5992:5992:5992))
        (PORT ena (1371:1371:1371) (1371:1371:1371))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~312)
    (DELAY
      (ABSOLUTE
        (PORT clk (1557:1557:1557) (1557:1557:1557))
        (PORT sdata (5941:5941:5941) (5941:5941:5941))
        (PORT ena (1376:1376:1376) (1376:1376:1376))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~296)
    (DELAY
      (ABSOLUTE
        (PORT clk (1557:1557:1557) (1557:1557:1557))
        (PORT sdata (5946:5946:5946) (5946:5946:5946))
        (PORT ena (1615:1615:1615) (1615:1615:1615))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE Ram\|memory_array\~8704)
    (DELAY
      (ABSOLUTE
        (PORT dataa (6020:6020:6020) (6020:6020:6020))
        (PORT datab (306:306:306) (306:306:306))
        (PORT datad (6068:6068:6068) (6068:6068:6068))
        (IOPATH dataa combout (413:413:413) (413:413:413))
        (IOPATH datab combout (416:416:416) (416:416:416))
        (IOPATH datac combout (323:323:323) (323:323:323))
        (IOPATH datad combout (150:150:150) (150:150:150))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~344)
    (DELAY
      (ABSOLUTE
        (PORT clk (1556:1556:1556) (1556:1556:1556))
        (PORT datain (84:84:84) (84:84:84))
        (PORT ena (1627:1627:1627) (1627:1627:1627))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD datain (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE Ram\|memory_array\~8705)
    (DELAY
      (ABSOLUTE
        (PORT dataa (5851:5851:5851) (5851:5851:5851))
        (PORT datab (442:442:442) (442:442:442))
        (PORT datad (305:305:305) (305:305:305))
        (IOPATH dataa combout (438:438:438) (438:438:438))
        (IOPATH datab combout (416:416:416) (416:416:416))
        (IOPATH datac combout (323:323:323) (323:323:323))
        (IOPATH datad combout (150:150:150) (150:150:150))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_comb")
    (INSTANCE Ram\|memory_array\~8706)
    (DELAY
      (ABSOLUTE
        (PORT dataa (6128:6128:6128) (6128:6128:6128))
        (PORT datab (6016:6016:6016) (6016:6016:6016))
        (PORT datac (951:951:951) (951:951:951))
        (PORT datad (994:994:994) (994:994:994))
        (IOPATH dataa combout (438:438:438) (438:438:438))
        (IOPATH datab combout (420:420:420) (420:420:420))
        (IOPATH datac combout (275:275:275) (275:275:275))
        (IOPATH datad combout (150:150:150) (150:150:150))
      )
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~520)
    (DELAY
      (ABSOLUTE
        (PORT clk (1566:1566:1566) (1566:1566:1566))
        (PORT sdata (5780:5780:5780) (5780:5780:5780))
        (PORT ena (2066:2066:2066) (2066:2066:2066))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK
      (HOLD sdata (posedge clk) (266:266:266))
      (HOLD ena (posedge clk) (266:266:266))
    )
  )
  (CELL
    (CELLTYPE "cycloneii_lcell_ff")
    (INSTANCE Ram\|memory_array\~488)
    (DELAY
      (ABSOLUTE
        (PORT clk (1566:1566:1566) (1566:1566:1566))
        (PORT sdata (5785:5785:5785) (5785:5785:5785))
        (PORT ena (1634:1634:1634) (1634:1634:1634))
        (IOPATH (posedge clk) regout (250:250:250) (250:250:250))
      )
    )
    (TIMINGCHECK