part2.sim.rpt

This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak

; Overwrite Waveform Inputs With Simulation Outputs                                          ; Off        ;               ;
; Glitch Filtering                                                                           ; Off        ; Off           ;
+--------------------------------------------------------------------------------------------+------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------------------------------+
; |part2|myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ALTSYNCRAM ;
+--------------------------------------------------------------------------------------------+
Memory report data cannot be output to ASCII.
Please use Quartus II to view the memory report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      70.79 % ;
; Total nodes checked                                 ; 405          ;
; Total output ports checked                          ; 404          ;
; Total output ports with complete 1/0-value coverage ; 286          ;
; Total output ports with no 1/0-value coverage       ; 113          ;
; Total output ports with no 1-value coverage         ; 116          ;
; Total output ports with no 0-value coverage         ; 115          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                              ;
+----------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                    ; Output Port Name                                                                       ; Output Port Type ;
+----------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------+------------------+
; |part2|cnt[1]                                                                                ; |part2|cnt[1]                                                                          ; regout           ;
; |part2|Clock                                                                                 ; |part2|Clock                                                                           ; out0             ;
; |part2|SEG_COM~0                                                                             ; |part2|SEG_COM~0                                                                       ; out              ;
; |part2|SEG_COM~1                                                                             ; |part2|SEG_COM~1                                                                       ; out              ;
; |part2|SEG_COM~2                                                                             ; |part2|SEG_COM~2                                                                       ; out              ;
; |part2|SEG_COM~3                                                                             ; |part2|SEG_COM~3                                                                       ; out              ;
; |part2|SEG_COM~4                                                                             ; |part2|SEG_COM~4                                                                       ; out              ;
; |part2|SEG_COM~5                                                                             ; |part2|SEG_COM~5                                                                       ; out              ;
; |part2|SEG_COM~6                                                                             ; |part2|SEG_COM~6                                                                       ; out              ;
; |part2|SEG_COM~7                                                                             ; |part2|SEG_COM~7                                                                       ; out              ;
; |part2|SEG_COM~8                                                                             ; |part2|SEG_COM~8                                                                       ; out              ;
; |part2|SEG_COM~9                                                                             ; |part2|SEG_COM~9                                                                       ; out              ;
; |part2|SEG_COM~10                                                                            ; |part2|SEG_COM~10                                                                      ; out              ;
; |part2|SEG_COM~11                                                                            ; |part2|SEG_COM~11                                                                      ; out              ;
; |part2|SEG_COM~12                                                                            ; |part2|SEG_COM~12                                                                      ; out              ;
; |part2|SEG_COM~13                                                                            ; |part2|SEG_COM~13                                                                      ; out              ;
; |part2|SEG_COM~14                                                                            ; |part2|SEG_COM~14                                                                      ; out              ;
; |part2|SEG_COM~15                                                                            ; |part2|SEG_COM~15                                                                      ; out              ;
; |part2|SEG_COM~16                                                                            ; |part2|SEG_COM~16                                                                      ; out              ;
; |part2|SEG_COM~17                                                                            ; |part2|SEG_COM~17                                                                      ; out              ;
; |part2|SEG_COM~18                                                                            ; |part2|SEG_COM~18                                                                      ; out              ;
; |part2|SEG_COM~19                                                                            ; |part2|SEG_COM~19                                                                      ; out              ;
; |part2|SEG_COM~20                                                                            ; |part2|SEG_COM~20                                                                      ; out              ;
; |part2|SEG_COM~21                                                                            ; |part2|SEG_COM~21                                                                      ; out              ;
; |part2|SEG_COM~22                                                                            ; |part2|SEG_COM~22                                                                      ; out              ;
; |part2|SEG_COM~23                                                                            ; |part2|SEG_COM~23                                                                      ; out              ;
; |part2|SEG_COM~24                                                                            ; |part2|SEG_COM~24                                                                      ; out              ;
; |part2|SEG_COM~25                                                                            ; |part2|SEG_COM~25                                                                      ; out              ;
; |part2|SEG_COM~26                                                                            ; |part2|SEG_COM~26                                                                      ; out              ;
; |part2|SEG_COM~27                                                                            ; |part2|SEG_COM~27                                                                      ; out              ;
; |part2|SEG_DATA~2                                                                            ; |part2|SEG_DATA~2                                                                      ; out              ;
; |part2|SEG_DATA~3                                                                            ; |part2|SEG_DATA~3                                                                      ; out              ;
; |part2|SEG_DATA~4                                                                            ; |part2|SEG_DATA~4                                                                      ; out              ;
; |part2|SEG_DATA~5                                                                            ; |part2|SEG_DATA~5                                                                      ; out              ;
; |part2|SEG_DATA~6                                                                            ; |part2|SEG_DATA~6                                                                      ; out              ;
; |part2|SEG_DATA~7                                                                            ; |part2|SEG_DATA~7                                                                      ; out              ;
; |part2|SEG_DATA~9                                                                            ; |part2|SEG_DATA~9                                                                      ; out              ;
; |part2|SEG_DATA~10                                                                           ; |part2|SEG_DATA~10                                                                     ; out              ;
; |part2|SEG_DATA~11                                                                           ; |part2|SEG_DATA~11                                                                     ; out              ;
; |part2|SEG_DATA~12                                                                           ; |part2|SEG_DATA~12                                                                     ; out              ;