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part2.tan.rpt

来自「This codes is one of my univ projects I 」· RPT 代码 · 共 443 行 · 第 1/5 页
RPT
443 行
; N/A   ; None         ; 15.594 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[2] ; SW_A       ;
; N/A   ; None         ; 15.594 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[2] ; SW_A       ;
; N/A   ; None         ; 15.594 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[2] ; SW_A       ;
; N/A   ; None         ; 15.594 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[2] ; SW_A       ;
; N/A   ; None         ; 15.545 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[1] ; SW_A       ;
; N/A   ; None         ; 15.545 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[1] ; SW_A       ;
; N/A   ; None         ; 15.545 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[1] ; SW_A       ;
; N/A   ; None         ; 15.545 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[1] ; SW_A       ;
; N/A   ; None         ; 15.545 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[1] ; SW_A       ;
; N/A   ; None         ; 15.545 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[1] ; SW_A       ;
; N/A   ; None         ; 15.461 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[5] ; SW_A       ;
; N/A   ; None         ; 15.461 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[5] ; SW_A       ;
; N/A   ; None         ; 15.461 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[5] ; SW_A       ;
; N/A   ; None         ; 15.461 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[5] ; SW_A       ;
; N/A   ; None         ; 15.461 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[5] ; SW_A       ;
; N/A   ; None         ; 15.461 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[5] ; SW_A       ;
; N/A   ; None         ; 15.456 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[3] ; SW_A       ;
; N/A   ; None         ; 15.456 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[3] ; SW_A       ;
; N/A   ; None         ; 15.456 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[3] ; SW_A       ;
; N/A   ; None         ; 15.456 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[3] ; SW_A       ;
; N/A   ; None         ; 15.456 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[3] ; SW_A       ;
; N/A   ; None         ; 15.456 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[3] ; SW_A       ;
; N/A   ; None         ; 15.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[6] ; SW_A       ;
; N/A   ; None         ; 15.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[6] ; SW_A       ;
; N/A   ; None         ; 15.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[6] ; SW_A       ;
; N/A   ; None         ; 15.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[6] ; SW_A       ;
; N/A   ; None         ; 15.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[6] ; SW_A       ;
; N/A   ; None         ; 15.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[6] ; SW_A       ;
; N/A   ; None         ; 15.130 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[0] ; SW_A       ;
; N/A   ; None         ; 15.130 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[0] ; SW_A       ;
; N/A   ; None         ; 15.130 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[0] ; SW_A       ;
; N/A   ; None         ; 15.130 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[0] ; SW_A       ;
; N/A   ; None         ; 15.130 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[0] ; SW_A       ;
; N/A   ; None         ; 15.130 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[0] ; SW_A       ;
; N/A   ; None         ; 14.591 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 14.591 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 14.591 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 14.591 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 14.591 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 14.591 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 14.496 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[2] ; CLK        ;
; N/A   ; None         ; 14.496 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[2] ; CLK        ;
; N/A   ; None         ; 14.496 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[2] ; CLK        ;
; N/A   ; None         ; 14.496 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[2] ; CLK        ;
; N/A   ; None         ; 14.496 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[2] ; CLK        ;
; N/A   ; None         ; 14.496 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[2] ; CLK        ;
; N/A   ; None         ; 14.447 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[1] ; CLK        ;
; N/A   ; None         ; 14.447 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[1] ; CLK        ;
; N/A   ; None         ; 14.447 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[1] ; CLK        ;
; N/A   ; None         ; 14.447 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[1] ; CLK        ;
; N/A   ; None         ; 14.447 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[1] ; CLK        ;
; N/A   ; None         ; 14.447 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[1] ; CLK        ;
; N/A   ; None         ; 14.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 14.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 14.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 14.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 14.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 14.363 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 14.358 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 14.358 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 14.358 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 14.358 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 14.358 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 14.358 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 14.265 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[6] ; CLK        ;
; N/A   ; None         ; 14.265 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[6] ; CLK        ;
; N/A   ; None         ; 14.265 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[6] ; CLK        ;
; N/A   ; None         ; 14.265 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[6] ; CLK        ;
; N/A   ; None         ; 14.265 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[6] ; CLK        ;
; N/A   ; None         ; 14.265 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[6] ; CLK        ;
; N/A   ; None         ; 14.032 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_we_reg       ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 14.032 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg0 ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 14.032 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg1 ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 14.032 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg2 ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 14.032 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg3 ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 14.032 ns  ; myram:Ram|altsyncram:altsyncram_component|altsyncram_dlc1:auto_generated|ram_block1a0~porta_address_reg4 ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 11.141 ns  ; cnt[0]                                                                                                   ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 11.070 ns  ; cnt[1]                                                                                                   ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 10.862 ns  ; cnt[2]                                                                                                   ; SEG_DATA[4] ; CLK        ;
; N/A   ; None         ; 10.603 ns  ; cnt[0]                                                                                                   ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 10.585 ns  ; cnt[0]                                                                                                   ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 10.532 ns  ; cnt[1]                                                                                                   ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 10.514 ns  ; cnt[1]                                                                                                   ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 10.497 ns  ; cnt[0]                                                                                                   ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 10.434 ns  ; cnt[1]                                                                                                   ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 10.324 ns  ; cnt[2]                                                                                                   ; SEG_DATA[3] ; CLK        ;
; N/A   ; None         ; 10.306 ns  ; cnt[2]                                                                                                   ; SEG_DATA[0] ; CLK        ;
; N/A   ; None         ; 10.218 ns  ; cnt[2]                                                                                                   ; SEG_DATA[5] ; CLK        ;
; N/A   ; None         ; 10.059 ns  ; cnt[1]                                                                                                   ; SEG_DATA[6] ; CLK        ;
part2.tan.rpt - 源码说明

本页面展示了「This codes is one of my univ projects I ve been working on for 3months. I d like to share it and mak」中的 part2.tan.rpt 源码文件，采用 RPT 编程语言编写，共 443 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。
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