lib_at91rm9200.h

ARM板驱动程序源代码

	/** Write to the CR register*/
	pSPI->SPI_CR = AT91C_SPI_SPIEN;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_Disable*/
/** \brief Disable the SPI controller*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_Disable (
	AT91PS_SPI pSPI /* pointer to a SPI controller*/
	)
{
	/** Write to the CR register*/
	pSPI->SPI_CR = AT91C_SPI_SPIDIS;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_CfgMode*/
/** \brief Enable the SPI controller*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_CfgMode (
	AT91PS_SPI pSPI, /* pointer to a SPI controller*/
	int mode)        /* mode register */
{
	/** Write to the MR register*/
	pSPI->SPI_MR = mode;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_CfgPCS*/
/** \brief Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_CfgPCS (
	AT91PS_SPI pSPI, /* pointer to a SPI controller*/
	char PCS_Device) /* PCS of the Device*/
{	
 	/** Write to the MR register*/
	pSPI->SPI_MR &= 0xFFF0FFFF;
	pSPI->SPI_MR |= ( (PCS_Device<<16) & AT91C_SPI_PCS );
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_ReceiveFrame*/
/** \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_SPI_ReceiveFrame (
	AT91PS_SPI pSPI,
	char *pBuffer,
	unsigned int szBuffer,
	char *pNextBuffer,
	unsigned int szNextBuffer )
{
	return AT91F_PDC_ReceiveFrame(
		(AT91PS_PDC) &(pSPI->SPI_RPR),
		pBuffer,
		szBuffer,
		pNextBuffer,
		szNextBuffer);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_SendFrame*/
/** \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_SPI_SendFrame(
	AT91PS_SPI pSPI,
	char *pBuffer,
	unsigned int szBuffer,
	char *pNextBuffer,
	unsigned int szNextBuffer )
{
	return AT91F_PDC_SendFrame(
		(AT91PS_PDC) &(pSPI->SPI_RPR),
		pBuffer,
		szBuffer,
		pNextBuffer,
		szNextBuffer);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_Close*/
/** \brief Close SPI: disable IT disable transfert, close PDC*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_Close (
	AT91PS_SPI pSPI)     /* \arg pointer to a SPI controller*/
{
    /** Reset all the Chip Select register*/
    pSPI->SPI_CSR[0] = 0 ;
    pSPI->SPI_CSR[1] = 0 ;
    pSPI->SPI_CSR[2] = 0 ;
    pSPI->SPI_CSR[3] = 0 ;

    /** Reset the SPI mode*/
    pSPI->SPI_MR = 0  ;

    /** Disable all interrupts*/
    pSPI->SPI_IDR = 0xFFFFFFFF ;

    /** Abort the Peripheral Data Transfers*/
    AT91F_PDC_Close((AT91PS_PDC) &(pSPI->SPI_RPR));

    /** Disable receiver and transmitter and stop any activity immediately*/
    pSPI->SPI_CR = AT91C_SPI_SPIDIS;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_PutChar*/
/** \brief Send a character,does not check if ready to send*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_PutChar (
	AT91PS_SPI pSPI,
	unsigned int character,
             unsigned int cs_number )
{
    unsigned int value_for_cs;
    value_for_cs = (~(1 << cs_number)) & 0xF;  /*Place a zero among a 4 ONEs number*/
    pSPI->SPI_TDR = (character & 0xFFFF) | (value_for_cs << 16);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_GetChar*/
/** \brief Receive a character,does not check if a character is available*/
/**----------------------------------------------------------------------------*/
__inline int AT91F_SPI_GetChar (
	const AT91PS_SPI pSPI)
{
    return((pSPI->SPI_RDR) & 0xFFFF);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_GetInterruptMaskStatus*/
/** \brief Return SPI Interrupt Mask Status*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_SPI_GetInterruptMaskStatus( /* \return SPI Interrupt Mask Status*/
        AT91PS_SPI pSpi) /* \arg  pointer to a SPI controller*/
{
        return pSpi->SPI_IMR;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_IsInterruptMasked*/
/** \brief Test if SPI Interrupt is Masked */
/**----------------------------------------------------------------------------*/
__inline int AT91F_SPI_IsInterruptMasked(
        AT91PS_SPI pSpi,   /* \arg  pointer to a SPI controller*/
        unsigned int flag) /* \arg  flag to be tested*/
{
        return (AT91F_SPI_GetInterruptMaskStatus(pSpi) & flag);
}

/* *****************************************************************************
                SOFTWARE API FOR TC
   ***************************************************************************** */
/**----------------------------------------------------------------------------*/
/** \fn    AT91F_TC_InterruptEnable*/
/** \brief Enable TC Interrupt*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_TC_InterruptEnable(
        AT91PS_TC pTc,   /* \arg  pointer to a TC controller*/
        unsigned int flag) /* \arg  TC interrupt to be enabled*/
{
        pTc->TC_IER = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_TC_InterruptDisable*/
/** \brief Disable TC Interrupt*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_TC_InterruptDisable(
        AT91PS_TC pTc,   /* \arg  pointer to a TC controller*/
        unsigned int flag) /* \arg  TC interrupt to be disabled*/
{
        pTc->TC_IDR = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_TC_GetInterruptMaskStatus*/
/** \brief Return TC Interrupt Mask Status*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_TC_GetInterruptMaskStatus( /* \return TC Interrupt Mask Status*/
        AT91PS_TC pTc) /* \arg  pointer to a TC controller*/
{
        return pTc->TC_IMR;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_TC_IsInterruptMasked*/
/** \brief Test if TC Interrupt is Masked */
/**----------------------------------------------------------------------------*/
__inline int AT91F_TC_IsInterruptMasked(
        AT91PS_TC pTc,   /* \arg  pointer to a TC controller*/
        unsigned int flag) /* \arg  flag to be tested*/
{
        return (AT91F_TC_GetInterruptMaskStatus(pTc) & flag);
}

/* *****************************************************************************
                SOFTWARE API FOR PMC
   ***************************************************************************** */
/**----------------------------------------------------------------------------*/
/** \fn    AT91F_CKGR_GetMainClock*/
/** \brief Return Main clock in Hz*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_CKGR_GetMainClock (
	AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller*/
	unsigned int slowClock)  /* \arg slowClock in Hz*/
{
	return ((pCKGR->CKGR_MCFR  & AT91C_CKGR_MAINF) * slowClock) >> 4;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PMC_GetProcessorClock*/
/** \brief Return processor clock in Hz (for AT91RM3400 and AT91RM9200)*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_PMC_GetProcessorClock (
	AT91PS_PMC pPMC, /* \arg pointer to PMC controller*/
	AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller*/
	unsigned int slowClock)  /* \arg slowClock in Hz*/
{
	unsigned int reg = pPMC->PMC_MCKR;
	unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
	unsigned int pllDivider, pllMultiplier;

	switch (reg & AT91C_PMC_CSS) {
		case AT91C_PMC_CSS_SLOW_CLK: /* Slow clock selected*/
			return slowClock / prescaler;
		case AT91C_PMC_CSS_MAIN_CLK: /* Main clock is selected*/
			return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
		case AT91C_PMC_CSS_PLLA_CLK: /* PLLA clock is selected*/
			reg = pCKGR->CKGR_PLLAR;
			pllDivider    = (reg  & AT91C_CKGR_DIVA);
			pllMultiplier = ((reg  & AT91C_CKGR_MULA) >> 16) + 1;
			if (reg & AT91C_CKGR_SRCA) /* Source is Main clock*/
				return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
			else                       /* Source is Slow clock*/
				return slowClock / pllDivider * pllMultiplier / prescaler;
		case AT91C_PMC_CSS_PLLB_CLK: /* PLLB clock is selected*/
			reg = pCKGR->CKGR_PLLBR;
			pllDivider    = (reg  & AT91C_CKGR_DIVB);
			pllMultiplier = ((reg  & AT91C_CKGR_MULB) >> 16) + 1;
			return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
	}
	return 0;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PMC_GetMasterClock*/
/** \brief Return master clock in Hz (just for AT91RM9200)*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_PMC_GetMasterClock (
	AT91PS_PMC pPMC, /* \arg pointer to PMC controller*/
	AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller*/
	unsigned int slowClock)  /* \arg slowClock in Hz*/
{
	return AT91F_PMC_GetProcessorClock(pPMC, pCKGR, slowClock) /
		(((pPMC->PMC_MCKR & AT91C_PMC_MDIV) >> 8)+1);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PMC_EnablePeriphClock*/
/** \brief Enable peripheral clock*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PMC_EnablePeriphClock (
	AT91PS_PMC pPMC, /* \arg pointer to PMC controller*/
	unsigned int periphIds)  /* \arg IDs of peripherals to enable*/
{
	pPMC->PMC_PCER = periphIds;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PMC_DisablePeriphClock*/
/** \brief Enable peripheral clock*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PMC_DisablePeriphClock (
	AT91PS_PMC pPMC, /* \arg pointer to PMC controller*/
	unsigned int periphIds)  /* \arg IDs of peripherals to enable*/
{
	pPMC->PMC_PCDR = periphIds;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PMC_EnablePCK*/
/** \brief Enable peripheral clock*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PMC_EnablePCK (
	AT91PS_PMC pPMC, /* \arg pointer to PMC controller*/
	unsigned int pck,  /* \arg Peripheral clock identifier 0 .. 7*/
	unsigned int ccs,  /* \arg clock selection: AT91C_PMC_CSS_SLOW_CLK, AT91C_PMC_CSS_MAIN_CLK, AT91C_PMC_CSS_PLLA_CLK, AT91C_PMC_CSS_PLLB_CLK*/
	unsigned int pres) /* \arg Programmable clock prescalar AT91C_PMC_PRES_CLK, AT91C_PMC_PRES_CLK_2, ..., AT91C_PMC_PRES_CLK_64*/
{
	pPMC->PMC_PCKR[pck] = ccs | pres;
	pPMC->PMC_SCER = (1 << pck) << 8;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PMC_DisablePCK*/
/** \brief Enable peripheral clock*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PMC_DisablePCK (
	AT91PS_PMC pPMC, /* \arg pointer to PMC controller*/
	unsigned int pck)  /* \arg Peripheral clock identifier 0 .. 7*/
{
	pPMC->PMC_SCDR = (1 << pck) << 8;
}

/* *****************************************************************************
                SOFTWARE API FOR PIO
   ***************************************************************************** */
/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PIO_CfgPeriph*/
/** \brief Enable pins to be drived by peripheral*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PIO_CfgPeriph(
	AT91PS_PIO pPio,             /* \arg pointer to a PIO controller*/
	unsigned int periphAEnable,  /* \arg PERIPH A to enable*/
	unsigned int periphBEnable)  /* \arg PERIPH B to enable*/

{
	pPio->PIO_ASR = periphAEnable;
	pPio->PIO_BSR = periphBEnable;
	pPio->PIO_PDR = (periphAEnable | periphBEnable); /* Set in Periph mode*/
}