lib_at91rm9200.h

ARM板驱动程序源代码

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_RTC_InterruptDisable*/
/** \brief Disable RTC Interrupt*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_RTC_InterruptDisable(
        AT91PS_RTC pRtc,   /* \arg  pointer to a RTC controller*/
        unsigned int flag) /* \arg  RTC interrupt to be disabled*/
{
        pRtc->RTC_IDR = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_RTC_GetInterruptMaskStatus*/
/** \brief Return RTC Interrupt Mask Status*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_RTC_GetInterruptMaskStatus( /* \return RTC Interrupt Mask Status*/
        AT91PS_RTC pRtc) /* \arg  pointer to a RTC controller*/
{
        return pRtc->RTC_IMR;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_RTC_IsInterruptMasked*/
/** \brief Test if RTC Interrupt is Masked */
/**----------------------------------------------------------------------------*/
__inline int AT91F_RTC_IsInterruptMasked(
        AT91PS_RTC pRtc,   /* \arg  pointer to a RTC controller*/
        unsigned int flag) /* \arg  flag to be tested*/
{
        return (AT91F_RTC_GetInterruptMaskStatus(pRtc) & flag);
}

/* *****************************************************************************
                SOFTWARE API FOR SSC
   ***************************************************************************** */
/** Define the standard I2S mode configuration*/

/** Configuration to set in the SSC Transmit Clock Mode Register*/
/** Parameters :  nb_bit_by_slot : 8, 16 or 32 bits*/
/** 			  nb_slot_by_frame : number of channels*/
#define AT91C_I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
									   AT91C_SSC_CKS_DIV   +\
                            		   AT91C_SSC_CKO_CONTINOUS      +\
                            		   AT91C_SSC_CKG_NONE    +\
                                       AT91C_SSC_START_FALL_RF +\
                           			   AT91C_SSC_STTOUT  +\
                            		   ((1<<16) & AT91C_SSC_STTDLY) +\
                            		   ((((nb_bit_by_slot*nb_slot_by_frame)/2)-1) <<24))


/** Configuration to set in the SSC Transmit Frame Mode Register*/
/** Parameters : nb_bit_by_slot : 8, 16 or 32 bits*/
/** 			 nb_slot_by_frame : number of channels*/
#define AT91C_I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
									(nb_bit_by_slot-1)  +\
                            		AT91C_SSC_MSBF   +\
                            		(((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB)  +\
                            		(((nb_bit_by_slot-1)<<16) & AT91C_SSC_FSLEN) +\
                            		AT91C_SSC_FSOS_NEGATIVE)


/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_SetBaudrate*/
/** \brief Set the baudrate according to the CPU clock*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SSC_SetBaudrate (
        AT91PS_SSC pSSC,        /* \arg pointer to a SSC controller*/
        unsigned int mainClock, /* \arg peripheral clock*/
        unsigned int speed)     /* \arg SSC baudrate*/
{
        unsigned int baud_value;
        /** Define the baud rate divisor register*/
        if (speed == 0)
           baud_value = 0;
        else
        {
           baud_value = (unsigned int) (mainClock * 10)/(2*speed);
           if ((baud_value % 10) >= 5)
                  baud_value = (baud_value / 10) + 1;
           else
                  baud_value /= 10;
        }

        pSSC->SSC_CMR = baud_value;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_Configure*/
/** \brief Configure SSC*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SSC_Configure (
             AT91PS_SSC pSSC,          /* \arg pointer to a SSC controller*/
             unsigned int syst_clock,  /* \arg System Clock Frequency*/
             unsigned int baud_rate,   /* \arg Expected Baud Rate Frequency*/
             unsigned int clock_rx,    /* \arg Receiver Clock Parameters*/
             unsigned int mode_rx,     /* \arg mode Register to be programmed*/
             unsigned int clock_tx,    /* \arg Transmitter Clock Parameters*/
             unsigned int mode_tx)     /* \arg mode Register to be programmed*/
{
    /** Disable interrupts*/
	pSSC->SSC_IDR = (unsigned int) -1;

    /** Reset receiver and transmitter*/
	pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;

    /** Define the Clock Mode Register*/
	AT91F_SSC_SetBaudrate(pSSC, syst_clock, baud_rate);

     /** Write the Receive Clock Mode Register*/
	pSSC->SSC_RCMR =  clock_rx;

     /** Write the Transmit Clock Mode Register*/
	pSSC->SSC_TCMR =  clock_tx;

     /** Write the Receive Frame Mode Register*/
	pSSC->SSC_RFMR =  mode_rx;

     /** Write the Transmit Frame Mode Register*/
	pSSC->SSC_TFMR =  mode_tx;

    /** Clear Transmit and Receive Counters*/
	AT91F_PDC_Open((AT91PS_PDC) &(pSSC->SSC_RPR));


}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_EnableRx*/
/** \brief Enable receiving datas*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SSC_EnableRx (
	AT91PS_SSC pSSC)     /* \arg pointer to a SSC controller*/
{
    /** Enable receiver*/
    pSSC->SSC_CR = AT91C_SSC_RXEN;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_DisableRx*/
/** \brief Disable receiving datas*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SSC_DisableRx (
	AT91PS_SSC pSSC)     /* \arg pointer to a SSC controller*/
{
    /** Disable receiver*/
    pSSC->SSC_CR = AT91C_SSC_RXDIS;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_EnableTx*/
/** \brief Enable sending datas*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SSC_EnableTx (
	AT91PS_SSC pSSC)     /* \arg pointer to a SSC controller*/
{
    /** Enable  transmitter*/
    pSSC->SSC_CR = AT91C_SSC_TXEN;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_DisableTx*/
/** \brief Disable sending datas*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SSC_DisableTx (
	AT91PS_SSC pSSC)     /* \arg pointer to a SSC controller*/
{
    /** Disable  transmitter*/
    pSSC->SSC_CR = AT91C_SSC_TXDIS;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_EnableIt*/
/** \brief Enable SSC IT*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SSC_EnableIt (
	AT91PS_SSC pSSC, /* \arg pointer to a SSC controller*/
	unsigned int flag)   /* \arg IT to be enabled*/
{
	/** Write to the IER register*/
	pSSC->SSC_IER = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_DisableIt*/
/** \brief Disable SSC IT*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SSC_DisableIt (
	AT91PS_SSC pSSC, /* \arg pointer to a SSC controller*/
	unsigned int flag)   /* \arg IT to be disabled*/
{
	/** Write to the IDR register*/
	pSSC->SSC_IDR = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_ReceiveFrame*/
/** \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_SSC_ReceiveFrame (
	AT91PS_SSC pSSC,
	char *pBuffer,
	unsigned int szBuffer,
	char *pNextBuffer,
	unsigned int szNextBuffer )
{
	return AT91F_PDC_ReceiveFrame(
		(AT91PS_PDC) &(pSSC->SSC_RPR),
		pBuffer,
		szBuffer,
		pNextBuffer,
		szNextBuffer);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_SendFrame*/
/** \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_SSC_SendFrame(
	AT91PS_SSC pSSC,
	char *pBuffer,
	unsigned int szBuffer,
	char *pNextBuffer,
	unsigned int szNextBuffer )
{
	return AT91F_PDC_SendFrame(
		(AT91PS_PDC) &(pSSC->SSC_RPR),
		pBuffer,
		szBuffer,
		pNextBuffer,
		szNextBuffer);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_GetInterruptMaskStatus*/
/** \brief Return SSC Interrupt Mask Status*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_SSC_GetInterruptMaskStatus( /* \return SSC Interrupt Mask Status*/
        AT91PS_SSC pSsc) /* \arg  pointer to a SSC controller*/
{
        return pSsc->SSC_IMR;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SSC_IsInterruptMasked*/
/** \brief Test if SSC Interrupt is Masked */
/**----------------------------------------------------------------------------*/
__inline int AT91F_SSC_IsInterruptMasked(
        AT91PS_SSC pSsc,   /* \arg  pointer to a SSC controller*/
        unsigned int flag) /* \arg  flag to be tested*/
{
        return (AT91F_SSC_GetInterruptMaskStatus(pSsc) & flag);
}

/* *****************************************************************************
                SOFTWARE API FOR SPI
   ***************************************************************************** */
/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_Open*/
/** \brief Open a SPI Port*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_SPI_Open (
        const unsigned int null)  /* \arg*/
{
        /* NOT DEFINED AT THIS MOMENT */
        return ( 0 );
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_CfgCs*/
/** \brief Configure SPI chip select register*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_CfgCs (
	int cs,     /* SPI cs number (0 to 3)*/
 	int val)   /*  chip select register*/
{
	/** Write to the CSR register*/
	*(AT91C_SPI_CSR + cs) = val;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_EnableIt*/
/** \brief Enable SPI interrupt*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_EnableIt (
	AT91PS_SPI pSPI,     /* pointer to a SPI controller*/
	unsigned int flag)   /* IT to be enabled*/
{
	/** Write to the IER register*/
	pSPI->SPI_IER = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_DisableIt*/
/** \brief Disable SPI interrupt*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_DisableIt (
	AT91PS_SPI pSPI, /* pointer to a SPI controller*/
	unsigned int flag) /* IT to be disabled*/
{
	/** Write to the IDR register*/
	pSPI->SPI_IDR = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_Reset*/
/** \brief Reset the SPI controller*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_Reset (
	AT91PS_SPI pSPI /* pointer to a SPI controller*/
	)
{
	/** Write to the CR register*/
	pSPI->SPI_CR = AT91C_SPI_SWRST;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_SPI_Enable*/
/** \brief Enable the SPI controller*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_SPI_Enable (
	AT91PS_SPI pSPI /* pointer to a SPI controller*/
	)
{