lib_at91rm9200.h

ARM板驱动程序源代码

/**----------------------------------------------------------------------------*/
/**         ATMEL Microcontroller Software Support  -  ROUSSET  -*/
/**----------------------------------------------------------------------------*/
/** The software is delivered "AS IS" without warranty or condition of any*/
/** kind, either express, implied or statutory. This includes without*/
/** limitation any warranty or condition with respect to merchantability or*/
/** fitness for any particular purpose, or against the infringements of*/
/** intellectual property rights of others.*/
/**----------------------------------------------------------------------------*/
/** File Name           : lib_AT91RM9200.h*/
/** Object              : AT91RM9200 inlined functions*/
/** Generated           : AT91 SW Application Group  04/16/2003 (12:30:07)*/
/***/
/** CVS Reference       : /lib_pdc.h/1.2/Tue Jul 02 11:29:40 2002*/
/** CVS Reference       : /lib_dbgu.h/1.1/Fri Jan 31 11:18:40 2003*/
/** CVS Reference       : /lib_rtc_1245d.h/1.1/Fri Jan 31 11:19:12 2003*/
/** CVS Reference       : /lib_ssc.h/1.4/Fri Jan 31 11:19:20 2003*/
/** CVS Reference       : /lib_spi_AT91RMxxxx.h/1.2/Fri Jan 31 11:19:32 2003*/
/** CVS Reference       : /lib_tc_1753b.h/1.1/Fri Jan 31 11:20:02 2003*/
/** CVS Reference       : /lib_pmc.h/1.3/Thu Nov 14 06:40:46 2002*/
/** CVS Reference       : /lib_pio.h/1.3/Fri Jan 31 11:18:56 2003*/
/** CVS Reference       : /lib_twi.h/1.2/Fri Jan 31 11:19:38 2003*/
/** CVS Reference       : /lib_usart.h/1.5/Thu Nov 21 15:01:54 2002*/
/** CVS Reference       : /lib_mci.h/1.2/Wed Nov 20 13:18:56 2002*/
/** CVS Reference       : /lib_aic.h/1.3/Fri Jul 12 06:46:12 2002*/
/** CVS Reference       : /lib_udp.h/1.3/Fri Jan 31 11:19:48 2003*/
/** CVS Reference       : /lib_st.h/1.4/Fri Jan 31 11:20:14 2003*/
/**----------------------------------------------------------------------------*/

#ifndef lib_AT91RM9200_H
#define lib_AT91RM9200_H

/* *****************************************************************************
                SOFTWARE API FOR PDC
   ***************************************************************************** */
/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_SetNextRx*/
/** \brief Set the next receive transfer descriptor*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_SetNextRx (
	AT91PS_PDC pPDC,     /* \arg pointer to a PDC controller*/
	char *address,       /* \arg address to the next bloc to be received*/
	unsigned int bytes)  /* \arg number of bytes to be received*/
{
	pPDC->PDC_RNPR = (unsigned int) address;
	pPDC->PDC_RNCR = bytes;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_SetNextTx*/
/** \brief Set the next transmit transfer descriptor*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_SetNextTx (
	AT91PS_PDC pPDC,       /* \arg pointer to a PDC controller*/
	char *address,         /* \arg address to the next bloc to be transmitted*/
	unsigned int bytes)    /* \arg number of bytes to be transmitted*/
{
	pPDC->PDC_TNPR = (unsigned int) address;
	pPDC->PDC_TNCR = bytes;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_SetRx*/
/** \brief Set the receive transfer descriptor*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_SetRx (
	AT91PS_PDC pPDC,       /* \arg pointer to a PDC controller*/
	char *address,         /* \arg address to the next bloc to be received*/
	unsigned int bytes)    /* \arg number of bytes to be received*/
{
	pPDC->PDC_RPR = (unsigned int) address;
	pPDC->PDC_RCR = bytes;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_SetTx*/
/** \brief Set the transmit transfer descriptor*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_SetTx (
	AT91PS_PDC pPDC,       /* \arg pointer to a PDC controller*/
	char *address,         /* \arg address to the next bloc to be transmitted*/
	unsigned int bytes)    /* \arg number of bytes to be transmitted*/
{
	pPDC->PDC_TPR = (unsigned int) address;
	pPDC->PDC_TCR = bytes;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_EnableTx*/
/** \brief Enable transmit*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_EnableTx (
	AT91PS_PDC pPDC )       /* \arg pointer to a PDC controller*/
{
	pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_EnableRx*/
/** \brief Enable receive*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_EnableRx (
	AT91PS_PDC pPDC )       /* \arg pointer to a PDC controller*/
{
	pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_DisableTx*/
/** \brief Disable transmit*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_DisableTx (
	AT91PS_PDC pPDC )       /* \arg pointer to a PDC controller*/
{
	pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_DisableRx*/
/** \brief Disable receive*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_DisableRx (
	AT91PS_PDC pPDC )       /* \arg pointer to a PDC controller*/
{
	pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_IsTxEmpty*/
/** \brief Test if the current transfer descriptor has been sent*/
/**----------------------------------------------------------------------------*/
__inline int AT91F_PDC_IsTxEmpty ( /* \return return 1 if transfer is complete*/
	AT91PS_PDC pPDC )       /* \arg pointer to a PDC controller*/
{
	return !(pPDC->PDC_TCR);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_IsNextTxEmpty*/
/** \brief Test if the next transfer descriptor has been moved to the current td*/
/**----------------------------------------------------------------------------*/
__inline int AT91F_PDC_IsNextTxEmpty ( /* \return return 1 if transfer is complete*/
	AT91PS_PDC pPDC )       /* \arg pointer to a PDC controller*/
{
	return !(pPDC->PDC_TNCR);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_IsRxEmpty*/
/** \brief Test if the current transfer descriptor has been filled*/
/**----------------------------------------------------------------------------*/
__inline int AT91F_PDC_IsRxEmpty ( /* \return return 1 if transfer is complete*/
	AT91PS_PDC pPDC )       /* \arg pointer to a PDC controller*/
{
	return !(pPDC->PDC_RCR);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_IsNextRxEmpty*/
/** \brief Test if the next transfer descriptor has been moved to the current td*/
/**----------------------------------------------------------------------------*/
__inline int AT91F_PDC_IsNextRxEmpty ( /* \return return 1 if transfer is complete*/
	AT91PS_PDC pPDC )       /* \arg pointer to a PDC controller*/
{
	return !(pPDC->PDC_RNCR);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_Open*/
/** \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_Open (
	AT91PS_PDC pPDC)       /* \arg pointer to a PDC controller*/
{
    /** Disable the RX and TX PDC transfer requests*/
	AT91F_PDC_DisableRx(pPDC);
	AT91F_PDC_DisableTx(pPDC);

	/** Reset all Counter register Next buffer first*/
	AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
	AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
	AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
	AT91F_PDC_SetRx(pPDC, (char *) 0, 0);

    /** Enable the RX and TX PDC transfer requests*/
	AT91F_PDC_EnableRx(pPDC);
	AT91F_PDC_EnableTx(pPDC);
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_Close*/
/** \brief Close PDC: disable TX and RX reset transfer descriptors*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_PDC_Close (
	AT91PS_PDC pPDC)       /* \arg pointer to a PDC controller*/
{
    /** Disable the RX and TX PDC transfer requests*/
	AT91F_PDC_DisableRx(pPDC);
	AT91F_PDC_DisableTx(pPDC);

	/** Reset all Counter register Next buffer first*/
	AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
	AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
	AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
	AT91F_PDC_SetRx(pPDC, (char *) 0, 0);

}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_SendFrame*/
/** \brief Close PDC: disable TX and RX reset transfer descriptors*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_PDC_SendFrame(
	AT91PS_PDC pPDC,
	char *pBuffer,
	unsigned int szBuffer,
	char *pNextBuffer,
	unsigned int szNextBuffer )
{
	if (AT91F_PDC_IsTxEmpty(pPDC)) {
		/** Buffer and next buffer can be initialized*/
		AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer);
		AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer);
		return 2;
	}
	else if (AT91F_PDC_IsNextTxEmpty(pPDC)) {
		/** Only one buffer can be initialized*/
		AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer);
		return 1;
	}
	else {
		/** All buffer are in use...*/
		return 0;
	}
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_PDC_ReceiveFrame*/
/** \brief Close PDC: disable TX and RX reset transfer descriptors*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_PDC_ReceiveFrame (
	AT91PS_PDC pPDC,
	char *pBuffer,
	unsigned int szBuffer,
	char *pNextBuffer,
	unsigned int szNextBuffer )
{
	if (AT91F_PDC_IsRxEmpty(pPDC)) {
		/** Buffer and next buffer can be initialized*/
		AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer);
		AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer);
		return 2;
	}
	else if (AT91F_PDC_IsNextRxEmpty(pPDC)) {
		/** Only one buffer can be initialized*/
		AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer);
		return 1;
	}
	else {
		/** All buffer are in use...*/
		return 0;
	}
}
/* *****************************************************************************
                SOFTWARE API FOR DBGU
   ***************************************************************************** */
/**----------------------------------------------------------------------------*/
/** \fn    AT91F_DBGU_InterruptEnable*/
/** \brief Enable DBGU Interrupt*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_DBGU_InterruptEnable(
        AT91PS_DBGU pDbgu,   /* \arg  pointer to a DBGU controller*/
        unsigned int flag) /* \arg  dbgu interrupt to be enabled*/
{
        pDbgu->DBGU_IER = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_DBGU_InterruptDisable*/
/** \brief Disable DBGU Interrupt*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_DBGU_InterruptDisable(
        AT91PS_DBGU pDbgu,   /* \arg  pointer to a DBGU controller*/
        unsigned int flag) /* \arg  dbgu interrupt to be disabled*/
{
        pDbgu->DBGU_IDR = flag;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_DBGU_GetInterruptMaskStatus*/
/** \brief Return DBGU Interrupt Mask Status*/
/**----------------------------------------------------------------------------*/
__inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( /* \return DBGU Interrupt Mask Status*/
        AT91PS_DBGU pDbgu) /* \arg  pointer to a DBGU controller*/
{
        return pDbgu->DBGU_IMR;
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_DBGU_IsInterruptMasked*/
/** \brief Test if DBGU Interrupt is Masked */
/**----------------------------------------------------------------------------*/
__inline int AT91F_DBGU_IsInterruptMasked(
        AT91PS_DBGU pDbgu,   /* \arg  pointer to a DBGU controller*/
        unsigned int flag) /* \arg  flag to be tested*/
{
        return (AT91F_DBGU_GetInterruptMaskStatus(pDbgu) & flag);
}

/* *****************************************************************************
                SOFTWARE API FOR RTC
   ***************************************************************************** */
/**----------------------------------------------------------------------------*/
/** \fn    AT91F_RTC_InterruptEnable*/
/** \brief Enable RTC Interrupt*/
/**----------------------------------------------------------------------------*/
__inline void AT91F_RTC_InterruptEnable(
        AT91PS_RTC pRtc,   /* \arg  pointer to a RTC controller*/
        unsigned int flag) /* \arg  RTC interrupt to be enabled*/
{
        pRtc->RTC_IER = flag;
}