watch.map.qmsg

VHDL编写的

{ "Info" "ISGN_MEGAFN_DESCENDANT" "ctr:inst2\|lpm_add_sub:Add0\|addcore:adder\[0\] ctr:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\|addcore:adder\[0\]\", which is child of megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/quartus/quartus/libraries/megafunctions/lpm_add_sub.tdf" 278 9 0 } } { "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ctr:inst2\|lpm_add_sub:Add0\|addcore:adder\[0\]\|a_csnbuffer:oflow_node ctr:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\|addcore:adder\[0\]\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/quartus/quartus/libraries/megafunctions/addcore.tdf" 97 2 0 } } { "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ctr:inst2\|lpm_add_sub:Add0\|addcore:adder\[0\]\|a_csnbuffer:result_node ctr:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\|addcore:adder\[0\]\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/quartus/quartus/libraries/megafunctions/addcore.tdf" 189 5 0 } } { "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ctr:inst2\|lpm_add_sub:Add0\|look_add:look_ahead_unit ctr:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\|look_add:look_ahead_unit\", which is child of megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/quartus/quartus/libraries/megafunctions/lpm_add_sub.tdf" 281 4 0 } } { "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ctr:inst2\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs ctr:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/quartus/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ctr:inst2\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs ctr:inst2\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"ctr:inst2\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/quartus/quartus/libraries/megafunctions/lpm_add_sub.tdf" 288 2 0 } } { "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/quartus/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "IOPT_MLS_IGNORED_SUMMARY" "8 " "Info: Ignored 8 buffer(s)" { { "Info" "IOPT_MLS_IGNORED_SOFT" "8 " "Info: Ignored 8 SOFT buffer(s)" {  } {  } 0 0 "Ignored %1!d! SOFT buffer(s)" 0 0 "" 0 0}  } {  } 0 0 "Ignored %1!d! buffer(s)" 0 0 "" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "ctr:inst2\|q\[0\] display:inst1\|cnt2\[0\] " "Info (13350): Duplicate register \"ctr:inst2\|q\[0\]\" merged to single register \"display:inst1\|cnt2\[0\]\"" {  } { { "ctr.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/ctr.vhd" 29 -1 0 } }  } 0 13350 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "bcds GND " "Warning (13410): Pin \"bcds\" is stuck at GND" {  } { { "watch.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/watch.bdf" { { 184 696 712 360 "bcds" "" } } } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "keyout\[1\] VCC " "Warning (13410): Pin \"keyout\[1\]\" is stuck at VCC" {  } { { "watch.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/watch.bdf" { { 288 280 296 464 "keyout\[3..0\]" "" } } } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "keyout\[0\] VCC " "Warning (13410): Pin \"keyout\[0\]\" is stuck at VCC" {  } { { "watch.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/watch.bdf" { { 288 280 296 464 "keyout\[3..0\]" "" } } } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "clk " "Info: Promoted clock signal driven by pin \"clk\" to global clock signal" {  } {  } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0 "" 0 0}  } {  } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0 "" 0 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "clk " "Info: Promoted clock signal driven by pin \"clk\" to global clock signal" {  } {  } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0 "" 0 0}  } {  } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "171 " "Info: Implemented 171 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "5 " "Info: Implemented 5 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_OPINS" "16 " "Info: Implemented 16 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_MCELLS" "128 " "Info: Implemented 128 macrocells" {  } {  } 0 0 "Implemented %1!d! macrocells" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_SEXPS" "22 " "Info: Implemented 22 shareable expanders" {  } {  } 0 0 "Implemented %1!d! shareable expanders" 0 0 "" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 5 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "179 " "Info: Peak virtual memory: 179 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 11 04:34:26 2009 " "Info: Processing ended: Wed Mar 11 04:34:26 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Info: Elapsed time: 00:00:13" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:11 " "Info: Total CPU time (on all processors): 00:00:11" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}