prev_cmp_watch.tan.qmsg

VHDL编写的

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 0}
{ "Warning" "WTDB_ANALYZE_COMB_LATCHES_NOT_SUPPORTED" "" "Warning: Timing Analysis does not support the analysis of latches as synchronous elements for the currently selected device family" {  } {  } 0 0 "Timing Analysis does not support the analysis of latches as synchronous elements for the currently selected device family" 0 0 "" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" {  } { { "watch.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/watch.bdf" { { -64 96 264 -48 "clk" "" } } } } { "d:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "6 " "Warning: Found 6 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "ctr:inst2\|clk1 " "Info: Detected ripple clock \"ctr:inst2\|clk1\" as buffer" {  } { { "ctr.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/ctr.vhd" 14 -1 0 } } { "d:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "ctr:inst2\|clk1" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "keyboard:inst\|set " "Info: Detected ripple clock \"keyboard:inst\|set\" as buffer" {  } { { "keyboard.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/keyboard.vhd" 8 -1 0 } } { "d:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "keyboard:inst\|set" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "keyboard:inst\|set_sec " "Info: Detected ripple clock \"keyboard:inst\|set_sec\" as buffer" {  } { { "keyboard.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/keyboard.vhd" 8 -1 0 } } { "d:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "keyboard:inst\|set_sec" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "keyboard:inst\|set_secl " "Info: Detected ripple clock \"keyboard:inst\|set_secl\" as buffer" {  } { { "keyboard.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/keyboard.vhd" 8 -1 0 } } { "d:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "keyboard:inst\|set_secl" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "keyboard:inst\|updown " "Info: Detected ripple clock \"keyboard:inst\|updown\" as buffer" {  } { { "keyboard.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/keyboard.vhd" 8 -1 0 } } { "d:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "keyboard:inst\|updown" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "keyboard:inst\|cnt " "Info: Detected ripple clock \"keyboard:inst\|cnt\" as buffer" {  } { { "keyboard.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/数字系统设计/th最新版修改/keyboard.vhd" 8 -1 0 } } { "d:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "keyboard:inst\|cnt" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0 0}