fet110_ta12.s43

来自「msp430p1110」· S43 代码 · 共 55 行

#include  "msp430x11x1.h"
;******************************************************************************
;   MSP-FET430x110 Demo - Timer_A Toggle P1.1 With TA0 upmode, HF XTAL ACLK 
;
;   Description; Toggle P1.1 using hardware TA0 output. Timer_A is configured
;   in upmode with CCR0 defining period, TA0 also output on P1.1. In this 
;   example, CCR0 is loaded with 500 and TA0 will toggling P.1 at TACLK/500.
;   Thus the ouput frequency on P1.1 will be the TACLK/1000. No CPU or software 
;   resources required.
;   ACLK = MCLK = TACLK = HF XTAL
;   As coded with TACLK = ACLK, P1.1 output frequency = HF XTAL/1000
;   //** HF XTAL REQUIRED AND NOT INSTALLED ON FET **//
;
;                MSP430F1121
;             -----------------
;         /|\|              XIN|-  
;          | |                 | HF XTAL (455k - 8Mhz) 
;          --|RST          XOUT|-
;            |                 |
;            |             P1.1|-->TA0 ACLK/1000
;
;   M.Buccini
;   Texas Instruments, Inc
;   January 2002
;******************************************************************************
;------------------------------------------------------------------------------ 
            ORG     0F000h                  ; Program Start
;------------------------------------------------------------------------------ 
RESET       mov.w   #300h,SP                ; Initialize stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
SetupBC     bis.b   #XTS,&BCSCTL1           ; LFXT1 = HF XTAL
SetupOsc    bic.b   #OFIFG,&IFG1            ; Clear OSC fault flag 
            mov.w   #0FFh,R15               ; R15 = Delay 
SetupOsc1   dec.w   R15                     ; Additional delay to ensure start 
            jnz     SetupOsc1               ;
            bit.b   #OFIFG,&IFG1            ; OSC fault flag set? 
            jnz     SetupOsc                ; OSC Fault, clear flag again 
            bis.b   #SELM1+SELM0,&BCSCTL2   ; MCLK = LFXT1
SetupTA     mov.w   #TASSEL0+TACLR,&TACTL   ; ACLK, clear TAR
SetupC0     mov.w   #OUTMOD_4,&CCTL0        ; CCR0 toggle mode
            mov.w   #500-1,&CCR0            ; 
SetupP1     bis.b   #002h,&P1DIR            ; P1.1 output 
            bis.b   #002h,&P1SEL            ; P1.1 option slect 
            bis.w   #MC0,&TACTL             ; Start Timer_a in upmode
                                            ;						  
Mainloop    bis.w   #CPUOFF,SR              ; CPU off
            nop                             ; Required for C-spy
                                            ;
;------------------------------------------------------------------------------ 
;           Interrupt Vectors Used MSP430x11x1         
;------------------------------------------------------------------------------ 
            ORG     0FFFEh                  ; MSP430 RESET Vector
            DW      RESET                   ; 
            END