fet440_tb04.s43

来自「msp430f440的头程序」· S43 代码 · 共 59 行

S43
59
字号
#include  "msp430x44x.h"
;******************************************************************************
;   MSP-FET430P440 Demo - Timer_B Toggle P5.1, overflow ISR, 32kHz ACLK
;
;   Description; This program will toggle P5.1 using software and timer_B 
;   overflow ISR. In this example an ISR will trigger when TB overflows.  
;   Inside the TBX_ISR, P5.1 is toggled.  Toggle rate is exactly 0.25hz.  
;   ACLK = TBCLK = LFXT1 = 32768, MCLK = SMCLK = DCO = 32xACLK = 1.048576MHz
;   //*An external watch crystal on XIN XOUT is required for ACLK*//	  
;
;                 MSP430F449
;             -----------------
;         /|\|              XIN|-  
;          | |                 | 32kHz 
;          --|RST          XOUT|-
;            |                 |
;            |             P5.1|-->LED
;
;   M.Buccini
;   Texas Instruments, Inc
;   January 2002
;******************************************************************************
;------------------------------------------------------------------------------ 
            ORG     01100h                  ; Program Start
;------------------------------------------------------------------------------ 
RESET       mov.w   #0A00h,SP               ; Initialize '449 stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
SetupFLL    bis.b   #XCAP14PF,&FLL_CTL0     ; Configure load caps
SetupTB     mov.w   #TBSSEL0+TBCLR+TBIE,&TBCTL  ; ACLK, Clr TAR, interrupt
SetupP1     bis.b   #002h,&P5DIR            ; P5.1 output 
            bis.w   #MC1,&TBCTL             ; Start timer_B continous mode
            eint                            ; Enable interrupts
                                            ;							  
Mainloop    bis.w   #LPM3,SR                ; Remain in LPM3
            nop                             ; Required only for C-spy
                                            ;
;------------------------------------------------------------------------------ 
TBX_ISR;    Common ISR for TBCCR1-4 and overflow
;------------------------------------------------------------------------------ 
            add.w   &TBIV,PC                ; Add Timer_B offset vector
            reti                            ; CCR0 - no source
            reti                            ; CCR1
            reti                            ; CCR2
            reti                            ; CCR3
            reti                            ; CCR4
            reti                            ; CCR5
            reti                            ; CCR6
TB_over     xor.b   #002h,&P5OUT            ; Toggle P5.1
            reti                            ; Return from overflow ISR		 
                                            ;
;------------------------------------------------------------------------------ 
;           Interrupt Vectors Used MSP430x44x          
;------------------------------------------------------------------------------ 
            ORG     0FFFEh                  ; MSP430 RESET Vector
            DW      RESET                   ; 
            ORG     0FFF8h                  ; Timer_BX Vector
            DW      TBX_ISR                 ; 
            END

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