armdefs.h

skyeye的开源代码

/*  armdefs.h -- ARMulator common definitions:  ARM6 Instruction Emulator.
    Copyright (C) 1994 Advanced RISC Machines Ltd.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */

#ifndef _ARMDEFS_H_
#define _ARMDEFS_H_

#include <stdio.h>
#include <stdlib.h>
#include <errno.h>

//teawater add for arm2x86 2005.02.14-------------------------------------------
// koodailar remove it for mingw 2005.12.18----------------
//anthonylee modify it for portable 2007.01.30
#include "portable/mman.h"
//AJ2D--------------------------------------------------------------------------

//teawater add for arm2x86 2005.07.03-------------------------------------------

#include <sys/types.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <sys/stat.h>
#include <fcntl.h>
//AJ2D--------------------------------------------------------------------------

//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
#include <signal.h>
#include <sys/time.h>
//#define DBCT_TEST_SPEED
#define DBCT_TEST_SPEED_SEC	10
//AJ2D--------------------------------------------------------------------------

//teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
//#define DBCT_GDBRSP
//AJ2D--------------------------------------------------------------------------

#include <skyeye_defs.h>

#define ARM_BYTE_TYPE 		0
#define ARM_HALFWORD_TYPE 	1
#define ARM_WORD_TYPE 		2

//the define of cachetype
#define NONCACHE  0
#define DATACACHE  1
#define INSTCACHE  2

#ifndef __STDC__
typedef char *VoidStar;
#endif

typedef unsigned long long ARMdword;	/* must be 64 bits wide */
typedef unsigned int ARMword;	/* must be 32 bits wide */
typedef unsigned char ARMbyte;	/* must be 8 bits wide */
typedef unsigned short ARMhword;	/* must be 16 bits wide */
typedef struct ARMul_State ARMul_State;
typedef struct ARMul_io ARMul_io;
typedef struct ARMul_Energy ARMul_Energy;

//teawater add for arm2x86 2005.06.24-------------------------------------------
#include <stdint.h>
//AJ2D--------------------------------------------------------------------------
/*
//chy 2005-05-11
#ifndef __CYGWIN__
//teawater add for arm2x86 2005.02.14-------------------------------------------
typedef unsigned char           uint8_t;
typedef unsigned short          uint16_t;
typedef unsigned int            uint32_t;
#if defined (__x86_64__)
typedef unsigned long           uint64_t;
#else
typedef unsigned long long      uint64_t;
#endif
////AJ2D--------------------------------------------------------------------------
#endif
*/

#include "armmmu.h"
#include "armmem.h"
#include "armio.h"
#include "lcd/skyeye_lcd.h"


#include "skyeye.h"
#include "skyeye_device.h"
#include "net/skyeye_net.h"
#include "skyeye_config.h"


typedef unsigned ARMul_CPInits (ARMul_State * state);
typedef unsigned ARMul_CPExits (ARMul_State * state);
typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type,
			     ARMword instr, ARMword value);
typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type,
			     ARMword instr, ARMword * value);
typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type,
			     ARMword instr, ARMword * value);
typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type,
			     ARMword instr, ARMword value);
typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type,
			     ARMword instr);
typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg,
				ARMword * value);
typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg,
				 ARMword value);


//added by ksh,2004-3-5
struct ARMul_io
{
	ARMword *instr;		//to display the current interrupt state
	ARMword *net_flag;	//to judge if network is enabled
	ARMword *net_int;	//netcard interrupt

	//ywc,2004-04-01
	ARMword *ts_int;
	ARMword *ts_is_enable;
	ARMword *ts_addr_begin;
	ARMword *ts_addr_end;
	ARMword *ts_buffer;
};

/* added by ksh,2004-11-26,some energy profiling */
struct ARMul_Energy
{
	int energy_prof;	/* <tktan>  BUG200103282109 : for energy profiling */
	int enable_func_energy;	/* <tktan> BUG200105181702 */
	char *func_energy;
	int func_display;	/* <tktan> BUG200103311509 : for function call display */
	int func_disp_start;	/* <tktan> BUG200104191428 : to start func profiling */
	char *start_func;	/* <tktan> BUG200104191428 */

	FILE *outfile;		/* <tktan> BUG200105201531 : direct console to file */
	long long tcycle, pcycle;
	float t_energy;
	void *cur_task;		/* <tktan> BUG200103291737 */
	long long t_mem_cycle, t_idle_cycle, t_uart_cycle;
	long long p_mem_cycle, p_idle_cycle, p_uart_cycle;
	long long p_io_update_tcycle;
	/*record CCCR,to get current core frequency */
	ARMword cccr;
};
typedef struct
{
	const char *cpu_arch_name;	/*cpu architecture version name.e.g. armv4t */
	const char *cpu_name;	/*cpu name. e.g. arm7tdmi or arm720t */
	ARMword cpu_val;	/*CPU value; also call MMU ID or processor id;see
				   ARM Architecture Reference Manual B2-6 */
	ARMword cpu_mask;	/*cpu_val's mask. */
	ARMword cachetype;	/*this cpu has what kind of cache */
} cpu_config_t;

#define MAX_BANK 8
#define MAX_STR  1024

typedef struct mem_bank
{
	ARMword (*read_byte) (ARMul_State * state, ARMword addr);
	void (*write_byte) (ARMul_State * state, ARMword addr, ARMword data);
	  ARMword (*read_halfword) (ARMul_State * state, ARMword addr);
	void (*write_halfword) (ARMul_State * state, ARMword addr,
				ARMword data);
	  ARMword (*read_word) (ARMul_State * state, ARMword addr);
	void (*write_word) (ARMul_State * state, ARMword addr, ARMword data);
	unsigned int addr, len;
	char filename[MAX_STR];
	unsigned type;		//chy 2003-09-21: maybe io,ram,rom
} mem_bank_t;

typedef struct
{
	int bank_num;
	int current_num;	/*current num of bank */
	mem_bank_t mem_banks[MAX_BANK];
} mem_config_t;
struct ARMul_State
{
	ARMword Emulate;	/* to start and stop emulation */
	unsigned EndCondition;	/* reason for stopping */
	unsigned ErrorCode;	/* type of illegal instruction */
	ARMword Reg[16];	/* the current register file */
	ARMword RegBank[7][16];	/* all the registers */
	ARMword Cpsr;		/* the current psr */
	ARMword Spsr[7];	/* the exception psr's */
	//chy:2003-08-19, used in arm xscale
	/* 40 bit accumulator.  We always keep this 64 bits wide,
	   and move only 40 bits out of it in an MRA insn.  */
	ARMdword Accumulator;

	ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags;	/* dummy flags for speed */
	//chy:2003-08-19, used in arm v5e|xscale
	ARMword SFlag;
#ifdef MODET
	ARMword TFlag;		/* Thumb state */
#endif
	ARMword Bank;		/* the current register bank */
	ARMword Mode;		/* the current mode */
	ARMword instr, pc, temp;	/* saved register state */
	ARMword loaded, decoded;	/* saved pipeline state */
	//chy 2006-04-12 for ICE breakpoint
	ARMword loaded_addr, decoded_addr;	/* saved pipeline state addr*/
	unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles;	/* emulated cycles used */
	unsigned long long NumInstrs;	/* the number of instructions executed */
	unsigned NextInstr;
	unsigned VectorCatch;	/* caught exception mask */
	unsigned CallDebug;	/* set to call the debugger */
	unsigned CanWatch;	/* set by memory interface if its willing to suffer the
				   overhead of checking for watchpoints on each memory
				   access */
	unsigned MemReadDebug, MemWriteDebug;
	unsigned int StopHandle;

	unsigned char *MemInPtr;	/* the Data In bus */
	unsigned char *MemOutPtr;	/* the Data Out bus (which you may not need */
	unsigned char *MemSparePtr;	/* extra space */
	ARMword MemSize;

	unsigned char *OSptr;	/* OS Handle */
	char *CommandLine;	/* Command Line from ARMsd */

	ARMul_CPInits *CPInit[16];	/* coprocessor initialisers */
	ARMul_CPExits *CPExit[16];	/* coprocessor finalisers */
	ARMul_LDCs *LDC[16];	/* LDC instruction */
	ARMul_STCs *STC[16];	/* STC instruction */
	ARMul_MRCs *MRC[16];	/* MRC instruction */
	ARMul_MCRs *MCR[16];	/* MCR instruction */
	ARMul_CDPs *CDP[16];	/* CDP instruction */
	ARMul_CPReads *CPRead[16];	/* Read CP register */
	ARMul_CPWrites *CPWrite[16];	/* Write CP register */
	unsigned char *CPData[16];	/* Coprocessor data */
	unsigned char const *CPRegWords[16];	/* map of coprocessor register sizes */

	unsigned EventSet;	/* the number of events in the queue */
	unsigned int Now;	/* time to the nearest cycle */
	struct EventNode **EventPtr;	/* the event list */

	unsigned Debug;		/* show instructions as they are executed */
	unsigned NresetSig;	/* reset the processor */
	unsigned NfiqSig;
	unsigned NirqSig;

	unsigned abortSig;
	unsigned NtransSig;
	unsigned bigendSig;
	unsigned prog32Sig;
	unsigned data32Sig;

/* 2004-05-09 chy
----------------------------------------------------------
read ARM Architecture Reference Manual
2.6.5 Data Abort
There are three Abort Model in ARM arch.

Early Abort Model: used in some ARMv3 and earlier implementations. In this
model, base register wirteback occurred for LDC,LDM,STC,STM instructions, and