nfi.h

MTK手机平台下载工具FLASHTOOL驱动源码

/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2001
*
*****************************************************************************/

/*****************************************************************************
 *
 * Filename:
 * ---------
 *   NFI.h
 *
 * Project:
 * --------
 *   Device Test
 *
 * Description:
 * ------------
 *   Item test - NANDFlash test.
 *
 * Author:
 * -------
 *   Shalyn Chua  (mtk00576)
 *
 *============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *------------------------------------------------------------------------------
 * $Revision:   1.0  $
 * $Modtime:   Mar 28 2005 11:20:28  $
 * $Log:   //mtkvs01/vmdata/new_flash_tool/archives/DA/INC/NFI.h-arc  $
 * 
 *    Rev 1.0   Oct 19 2005 14:40:22   mtk00539
 * Initial revision.
 * Resolution for 140: [BROM_DLL v2.7.1008][New] Support NFB download and many new features.
 *------------------------------------------------------------------------------
 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *============================================================================
 ****************************************************************************/
#ifndef _MTK_DVC_TEST_NFI_H
#define _MTK_DVC_TEST_NFI_H

#include "SW_TYPES.H"

/* Register definition */
#define NFI_base        (0x80090000)
#define NFI_ACCCON      ((volatile uint16 *)(NFI_base+0x0000))
#define NFI_PAGEFMT     ((volatile uint16 *)(NFI_base+0x0004))
#define NFI_OPCON       ((volatile uint16 *)(NFI_base+0x0008))
#define NFI_CMD         ((volatile uint16 *)(NFI_base+0x000C))
#define NFI_ADDNOB      ((volatile uint16 *)(NFI_base+0x0010))
#define NFI_ADDRL       ((volatile uint32 *)(NFI_base+0x0014))
#define NFI_ADDRM       ((volatile uint16 *)(NFI_base+0x0018))
#define NFI_DATAW       ((volatile uint32 *)(NFI_base+0x001C))
#define NFI_DATAWB      ((volatile uint16 *)(NFI_base+0x0020))
#define NFI_DATAR       ((volatile uint32 *)(NFI_base+0x0024))
#define NFI_DATARB	   ((volatile uint16 *)(NFI_base+0x0028))
#define NFI_PSTA        ((volatile uint16 *)(NFI_base+0x002C))
#define NFI_FIFOCON     ((volatile uint16 *)(NFI_base+0x0030))
#define NFI_CON         ((volatile uint16 *)(NFI_base+0x0034))
#define NFI_INTR        ((volatile uint16 *)(NFI_base+0x0038))
#define NFI_INTR_EN     ((volatile uint16 *)(NFI_base+0x003C))
#define NFI_PAGECNTR	   ((volatile uint16 *)(NFI_base+0x0040))
#define NFI_ADDRCNTR	   ((volatile uint16 *)(NFI_base+0x0044))
#define NFI_SYM0_ADDR   ((volatile uint16 *)(NFI_base+0x0050))
#define NFI_SYM1_ADDR   ((volatile uint16 *)(NFI_base+0x0054))
#define NFI_SYM2_ADDR   ((volatile uint16 *)(NFI_base+0x0058))
#define NFI_SYM3_ADDR   ((volatile uint16 *)(NFI_base+0x005C))
#define NFI_SYM0_DAT    ((volatile uint32 *)(NFI_base+0x0060))
#define NFI_SYM1_DAT    ((volatile uint32 *)(NFI_base+0x0064))
#define NFI_SYM2_DAT    ((volatile uint32 *)(NFI_base+0x0068))
#define NFI_SYM3_DAT    ((volatile uint32 *)(NFI_base+0x006C))
#define NFI_ERRDET      ((volatile uint16 *)(NFI_base+0x0070))
#define NFI_PAR0        ((volatile uint16 *)(NFI_base+0x0080))
#define NFI_PAR1        ((volatile uint16 *)(NFI_base+0x0084))
#define NFI_PAR2        ((volatile uint16 *)(NFI_base+0x0088))
#define NFI_PAR3        ((volatile uint16 *)(NFI_base+0x008C))
#define NFI_PAR4        ((volatile uint16 *)(NFI_base+0x0090))
#define NFI_PAR5        ((volatile uint16 *)(NFI_base+0x0094))
#define NFI_PAR6        ((volatile uint16 *)(NFI_base+0x0098))
#define NFI_PAR7        ((volatile uint16 *)(NFI_base+0x009C))
#define NFI_CSEL	      ((volatile uint16 *)(NFI_base+0x0100))


/*******************************************************************************
 * NFI register definition
 *******************************************************************************/
/* NFI_ACCCON */
#define ACCCON				0x07C6	// C2R=111, W2R=11, WH=00, WST=00, RLT=10

/* NFI_PAGEFMT */
#define PAGEFMT_512			0x0020
#define PAGEFMT_2K			0x0025
#define PAGEFMT_8BITS		0x0000
#define PAGEFMT_16BITS		0x0100


/* NFI_OPCON */
#define BURST_RD           0x0001
#define BURST_WR           0x0002
#define ECC_RD_INIT        0x0010
#define ECC_WR_INIT        0x0020
#define SINGLE_RD          0x0100
#define NOB_BYTE           0x1000
#define NOB_WORD           0x2000
#define NOB_DWORD          0x0000


/* NFI_PSTA */
#define STATUS_CMD         0x1
#define STATUS_ADDR        0x2
#define STATUS_DATAR       0x4
#define STATUS_DATAW       0x8
#define STATUS_BUSY        0x100


/* NFI_FIFOCON */
#define RD_EMPTY_MASK      0x001
#define RD_FULL_MASK       0x002
#define WR_EMPTY_MASK      0x004
#define WR_FULL_MASK      	0x008
#define FIFO_FLUSH         0x010
#define RESET              0x020


/* NFI_CON */
#define BYTE_RW_EN		   0x8000
#define MULTIPAGE_CON	   0x0800
#define READ_CON_EN		   0x0400
#define PROGRAM_CON_EN		0x0200
#define ERASE_CON_EN		   0x0100
#define SW_PROGSPARE_EN    0x0020
#define MULTI_PAGE_RD_EN   0x0010
#define AUTOECC_ENC_EN     0x0008
#define AUTOECC_DEC_EN     0x0004
#define DMA_WR_EN          0x0002
#define DMA_RD_EN          0x0001


/* NFI_CSEL */
#define DEVICE_512		   0x00
#define DEVICE_2K		      0x01


/* Status register */
#define STATUS_FAIL			0x01
#define STATUS_READY		0x40
#define STATUS_WR_ALLOW		0x80
 
/* NFI_INTR_EN */
#define RD_COMPLETE_EN     0x01
#define WR_COMPLETE_EN     0x02
#define RESET_COMPLETE_EN  0x04
#define ERASE_COMPLETE_EN  0x08
#define ERR_DET_EN         0x10
#define ERR_COR_EN         0x20
#define BUSY_RETURN_EN     0x40
#define ALL_EN             0x7F

/* NFI_INTR */
#define RD_COMPLETE        0x0001
#define WR_COMPLETE        0x0002
#define RESET_COMPLETE     0x0004
#define ERASE_COMPLETE     0x0008
#define ERR_DET0           0x0010
#define ERR_DET1           0x0020
#define ERR_DET2           0x0040
#define ERR_DET3           0x0080
#define ERR_COR0           0x0100
#define ERR_COR1           0x0200
#define ERR_COR2           0x0400
#define ERR_COR3           0x0800
#define BUSY_RETURN        0x1000

#define NFI_Wait_Ready(timeout)   while ( (*NFI_PSTA & STATUS_BUSY) && (timeout--) )

#endif