qtest1.mdl

四元数工具箱

Model {
  Name			  "qtest1"
  Version		  3.00
  SimParamPage		  "WorkspaceI/O"
  SampleTimeColors	  off
  InvariantConstants	  off
  WideVectorLines	  off
  ShowLineWidths	  off
  ShowPortDataTypes	  off
  StartTime		  "0.0"
  StopTime		  "1.0"
  SolverMode		  "Auto"
  Solver		  "FixedStepDiscrete"
  RelTol		  "1e-3"
  AbsTol		  "auto"
  Refine		  "1"
  MaxStep		  "auto"
  InitialStep		  "auto"
  FixedStep		  "1.0"
  MaxOrder		  5
  OutputOption		  "RefineOutputTimes"
  OutputTimes		  "[]"
  LoadExternalInput	  off
  ExternalInput		  "[t, u]"
  SaveTime		  off
  TimeSaveName		  "tout"
  SaveState		  off
  StateSaveName		  "xout"
  SaveOutput		  off
  OutputSaveName	  "yout"
  LoadInitialState	  off
  InitialState		  "xInitial"
  SaveFinalState	  off
  FinalStateName	  "xFinal"
  SaveFormat		  "Matrix"
  LimitMaxRows		  on
  MaxRows		  "1"
  Decimation		  "1"
  AlgebraicLoopMsg	  "warning"
  MinStepSizeMsg	  "warning"
  UnconnectedInputMsg	  "warning"
  UnconnectedOutputMsg	  "warning"
  UnconnectedLineMsg	  "warning"
  InheritedTsInSrcMsg	  "warning"
  IntegerOverflowMsg	  "warning"
  UnnecessaryDatatypeConvMsg "none"
  Int32ToFloatConvMsg	  "warning"
  SignalLabelMismatchMsg  "none"
  ConsistencyChecking	  "off"
  ZeroCross		  on
  SimulationMode	  "normal"
  BlockDataTips		  on
  BlockParametersDataTip  on
  BlockAttributesDataTip  off
  BlockPortWidthsDataTip  off
  BlockDescriptionStringDataTip	off
  BlockMaskParametersDataTip off
  ToolBar		  on
  StatusBar		  on
  BrowserShowLibraryLinks off
  BrowserLookUnderMasks	  off
  OptimizeBlockIOStorage  on
  BufferReuse		  on
  BooleanDataType	  off
  RTWSystemTargetFile	  "grt.tlc"
  RTWInlineParameters	  off
  RTWRetainRTWFile	  off
  RTWTemplateMakefile	  "grt_default_tmf"
  RTWMakeCommand	  "make_rtw"
  RTWGenerateCodeOnly	  off
  ExtModeMexFile	  "ext_comm"
  ExtModeBatchMode	  off
  ExtModeTrigType	  "manual"
  ExtModeTrigMode	  "oneshot"
  ExtModeTrigPort	  "1"
  ExtModeTrigElement	  "any"
  ExtModeTrigDuration	  1000
  ExtModeTrigHoldOff	  0
  ExtModeTrigDelay	  0
  ExtModeTrigDirection	  "rising"
  ExtModeTrigLevel	  0
  ExtModeArchiveMode	  "off"
  ExtModeAutoIncOneShot	  off
  ExtModeIncDirWhenArm	  off
  ExtModeAddSuffixToVar	  off
  ExtModeWriteAllDataToWs off
  ExtModeArmWhenConnect	  off
  Created		  "Wed Oct 25 22:30:53 2000"
  Creator		  "stpierre"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "stpierre"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Sun Nov  5 01:03:16 2000"
  ModelVersionFormat	  "1.%<AutoIncrement:6>"
  ConfigurationManager	  "none"
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "qtest1"
    Location		    [7, 53, 651, 403]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    ZoomFactor		    "100"
    AutoZoom		    on
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Constant
      Name		      "Constant 1"
      Position		      [15, 24, 65, 46]
      BackgroundColor	      "cyan"
      ShowName		      off
      Value		      "sim_q"
    }
    Block {
      BlockType		      Constant
      Name		      "Constant 2"
      Position		      [235, 134, 285, 156]
      ForegroundColor	      "blue"
      BackgroundColor	      "cyan"
      ShowName		      off
      Value		      "sim_v"
    }
    Block {
      BlockType		      Reference
      Name		      "DCM to\nQuaternion"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [470, 238, 510, 272]
      SourceBlock	      "qlib/DCM to\nQuaternion"
      SourceType	      "DCM to Quaternion"
    }
    Block {
      BlockType		      Reference
      Name		      "Quaternion\nConjugate"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [120, 89, 160, 121]
      SourceBlock	      "qlib/Quaternion\nConjugate"
      SourceType	      "Quaternion Conjugate"
    }
    Block {
      BlockType		      Reference
      Name		      "Quaternion\nDecomposition"
      Ports		      [1, 2, 0, 0, 0]
      Position		      [385, 17, 425, 53]
      SourceBlock	      "qlib/Quaternion\nDecomposition"
      SourceType	      "Quaternion Decomposition"
    }
    Block {
      BlockType		      Reference
      Name		      "Quaternion\nMultiply"
      Ports		      [2, 1, 0, 0, 0]
      Position		      [120, 172, 160, 208]
      SourceBlock	      "qlib/Quaternion\nMultiply"
      SourceType	      "Quaternion Multiply"
    }
    Block {
      BlockType		      Reference
      Name		      "Quaternion\nNormalize"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [120, 19, 160, 51]
      SourceBlock	      "qlib/Quaternion\nNormalize"
      SourceType	      "Quaternion Normalize"
    }
    Block {
      BlockType		      Reference
      Name		      "Quaternion\nVector Rotation"
      Ports		      [2, 1, 0, 0, 0]
      Position		      [385, 167, 425, 203]
      SourceBlock	      "qlib/Quaternion\nVector Rotation"
      SourceType	      "Quaternion Vector Rotation"
    }
    Block {
      BlockType		      Reference
      Name		      "Quaternion\nVector Transform"
      Ports		      [2, 1, 0, 0, 0]
      Position		      [385, 92, 425, 128]
      SourceBlock	      "qlib/Quaternion\nVector Transform"
      SourceType	      "Quaternion Vector Transform"
    }
    Block {
      BlockType		      Reference
      Name		      "Quaternion\nto DCM"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [385, 238, 425, 272]
      SourceBlock	      "qlib/Quaternion\nto DCM"
      SourceType	      "Quaternion to DCM"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace"
      Position		      [210, 46, 295, 64]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_qnorm"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace1"
      Position		      [210, 96, 295, 114]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_qconj"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace2"
      Position		      [205, 181, 290, 199]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_qmult"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace3"
      Position		      [475, 306, 560, 324]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_q2dcm"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace4"
      Position		      [535, 246, 620, 264]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_dcm2q"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace5"
      Position		      [475, 176, 560, 194]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_qvrot"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace6"
      Position		      [475, 101, 560, 119]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_qvxform"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace7"
      Position		      [465, 16, 550, 34]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_vector"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace8"
      Position		      [465, 36, 550, 54]
      BackgroundColor	      "yellow"
      ShowName		      off
      VariableName	      "sim_phi"
      Buffer		      "1"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Line {
      SrcBlock		      "Constant 1"
      SrcPort		      1
      Points		      [15, 0]
      Branch {
	DstBlock		"Quaternion\nNormalize"
	DstPort			1
      }
      Branch {
	Points			[0, 70]
	Branch {
	  DstBlock		  "Quaternion\nConjugate"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 75]
	  Branch {
	    DstBlock		    "Quaternion\nMultiply"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 20]
	    DstBlock		    "Quaternion\nMultiply"
	    DstPort		    2
	  }
	}
      }
    }
    Line {
      SrcBlock		      "Quaternion\nNormalize"
      SrcPort		      1
      Points		      [20, 0]
      Branch {
	Points			[0, 20]
	DstBlock		"To Workspace"
	DstPort			1
      }
      Branch {
	Points			[130, 0]
	Branch {
	  DstBlock		  "Quaternion\nDecomposition"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 65]
	  Branch {
	    DstBlock		    "Quaternion\nVector Transform"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 95]
	    Branch {
	      DstBlock		      "Quaternion\nVector Rotation"
	      DstPort		      2
	    }
	    Branch {
	      Points		      [0, 60]
	      DstBlock		      "Quaternion\nto DCM"
	      DstPort		      1
	    }
	  }
	}
      }
    }
    Line {
      SrcBlock		      "Quaternion\nConjugate"
      SrcPort		      1
      DstBlock		      "To Workspace1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Quaternion\nMultiply"
      SrcPort		      1
      DstBlock		      "To Workspace2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Quaternion\nto DCM"
      SrcPort		      1
      Points		      [10, 0]
      Branch {
	DstBlock		"DCM to\nQuaternion"
	DstPort			1
      }
      Branch {
	Points			[0, 60]
	DstBlock		"To Workspace3"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "DCM to\nQuaternion"
      SrcPort		      1
      DstBlock		      "To Workspace4"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Quaternion\nVector Rotation"
      SrcPort		      1
      DstBlock		      "To Workspace5"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Quaternion\nVector Transform"
      SrcPort		      1
      DstBlock		      "To Workspace6"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Quaternion\nDecomposition"
      SrcPort		      1
      DstBlock		      "To Workspace7"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Quaternion\nDecomposition"
      SrcPort		      2
      DstBlock		      "To Workspace8"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant 2"
      SrcPort		      1
      Points		      [50, 0]
      Branch {
	Points			[0, -25]
	DstBlock		"Quaternion\nVector Transform"
	DstPort			2
      }
      Branch {
	Points			[0, 30]
	DstBlock		"Quaternion\nVector Rotation"
	DstPort			1
      }
    }
    Annotation {
      Position		      [166, 285]
      Text		      "Note: the Quaternion Intergration\nBlock is tes"
"ted in qtest2"
    }
  }
}