📄 shiyan5.lst
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1 .file "shiyan5.c"
2 .arch atmega128
3 __SREG__ = 0x3f
4 __SP_H__ = 0x3e
5 __SP_L__ = 0x3d
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
8 .global __do_copy_data
9 .global __do_clear_bss
12 .text
13 .Ltext0:
86 .global global_uart1_data
87 .global global_uart1_data
88 .section .bss
91 global_uart1_data:
92 0000 00 .skip 1,0
93 .global command_send
94 .data
97 command_send:
98 0000 3A30 4530 .ascii ":0E0300050001A2\r\n"
98 3330 3030
98 3530 3030
98 3141 320D
98 0A
99 .global ii
100 .global ii
101 .section .bss
104 ii:
105 0001 0000 .skip 2,0
106 .text
109 .global delay_us
111 delay_us:
1:shiyan5.c **** #include <avr/io.h>
2:shiyan5.c **** #include <avr/signal.h>
3:shiyan5.c **** #include <avr/interrupt.h>
4:shiyan5.c **** #include <stdlib.h>
5:shiyan5.c **** #include <inttypes.h>
6:shiyan5.c **** #include <pgmspace.h>
7:shiyan5.c **** char global_uart1_data=0;
8:shiyan5.c **** char command_send[17]=":0E0300050001A2\r\n";
9:shiyan5.c **** char data_receive[20];
10:shiyan5.c **** int ii=0;
11:shiyan5.c **** // ":" 地址 命令 寄存器地址 寄存器数量 校验 回车 换行
12:shiyan5.c **** //******************************延时子程序*****************************************
13:shiyan5.c **** void delay_us(uint16_t u) //延时2us左右，delay(240)＝100us；
14:shiyan5.c **** {
113 .LM1:
114 /* prologue: frame size=2 */
115 0000 CF93 push r28
116 0002 DF93 push r29
117 0004 CDB7 in r28,__SP_L__
118 0006 DEB7 in r29,__SP_H__
119 0008 2297 sbiw r28,2
120 000a 0FB6 in __tmp_reg__,__SREG__
121 000c F894 cli
122 000e DEBF out __SP_H__,r29
123 0010 0FBE out __SREG__,__tmp_reg__
124 0012 CDBF out __SP_L__,r28
125 /* prologue end (size=10) */
126 0014 8983 std Y+1,r24
127 0016 9A83 std Y+2,r25
15:shiyan5.c **** while(u)
129 .LM2:
130 .L8:
131 0018 8981 ldd r24,Y+1
132 001a 9A81 ldd r25,Y+2
133 001c 0097 sbiw r24,0
134 001e 09F4 brne .L10
135 0020 06C0 rjmp .L7
136 .L10:
16:shiyan5.c **** {
17:shiyan5.c **** u--;
138 .LM3:
139 0022 8981 ldd r24,Y+1
140 0024 9A81 ldd r25,Y+2
141 0026 0197 sbiw r24,1
142 0028 8983 std Y+1,r24
143 002a 9A83 std Y+2,r25
144 002c F5CF rjmp .L8
18:shiyan5.c **** }
19:shiyan5.c **** }
146 .LM4:
147 .L7:
148 /* epilogue: frame size=2 */
149 002e 2296 adiw r28,2
150 0030 0FB6 in __tmp_reg__,__SREG__
151 0032 F894 cli
152 0034 DEBF out __SP_H__,r29
153 0036 0FBE out __SREG__,__tmp_reg__
154 0038 CDBF out __SP_L__,r28
155 003a DF91 pop r29
156 003c CF91 pop r28
157 003e 0895 ret
158 /* epilogue end (size=9) */
159 /* function delay_us size 32 (13) */
161 .Lscope0:
165 .global delay_ms
167 delay_ms:
20:shiyan5.c ****
21:shiyan5.c **** // 延时nms
22:shiyan5.c **** void delay_ms(uint16_t m)
23:shiyan5.c **** {
169 .LM5:
170 /* prologue: frame size=4 */
171 0040 CF93 push r28
172 0042 DF93 push r29
173 0044 CDB7 in r28,__SP_L__
174 0046 DEB7 in r29,__SP_H__
175 0048 2497 sbiw r28,4
176 004a 0FB6 in __tmp_reg__,__SREG__
177 004c F894 cli
178 004e DEBF out __SP_H__,r29
179 0050 0FBE out __SREG__,__tmp_reg__
180 0052 CDBF out __SP_L__,r28
181 /* prologue end (size=10) */
182 0054 8983 std Y+1,r24
183 0056 9A83 std Y+2,r25
24:shiyan5.c **** uint16_t i;
25:shiyan5.c **** for(i=0;i<m;i++)
185 .LM6:
186 .LBB2:
187 0058 1B82 std Y+3,__zero_reg__
188 005a 1C82 std Y+4,__zero_reg__
189 .L12:
190 005c 2B81 ldd r18,Y+3
191 005e 3C81 ldd r19,Y+4
192 0060 8981 ldd r24,Y+1
193 0062 9A81 ldd r25,Y+2
194 0064 2817 cp r18,r24
195 0066 3907 cpc r19,r25
196 0068 08F0 brlo .L15
197 006a 0AC0 rjmp .L11
198 .L15:
26:shiyan5.c **** {
27:shiyan5.c **** delay_us(2400); //延时1ms
200 .LM7:
201 006c 80E6 ldi r24,lo8(2400)
202 006e 99E0 ldi r25,hi8(2400)
203 0070 0E94 0000 call delay_us
205 .LM8:
206 0074 8B81 ldd r24,Y+3
207 0076 9C81 ldd r25,Y+4
208 0078 0196 adiw r24,1
209 007a 8B83 std Y+3,r24
210 007c 9C83 std Y+4,r25
211 007e EECF rjmp .L12
28:shiyan5.c **** }
29:shiyan5.c **** }
213 .LM9:
214 .L11:
215 .LBE2:
216 /* epilogue: frame size=4 */
217 0080 2496 adiw r28,4
218 0082 0FB6 in __tmp_reg__,__SREG__
219 0084 F894 cli
220 0086 DEBF out __SP_H__,r29
221 0088 0FBE out __SREG__,__tmp_reg__
222 008a CDBF out __SP_L__,r28
223 008c DF91 pop r29
224 008e CF91 pop r28
225 0090 0895 ret
226 /* epilogue end (size=9) */
227 /* function delay_ms size 41 (22) */
232 .Lscope1:
236 .global delay_s
238 delay_s:
30:shiyan5.c ****
31:shiyan5.c **** //延时ns
32:shiyan5.c **** void delay_s(uint16_t n)
33:shiyan5.c **** {
240 .LM10:
241 /* prologue: frame size=4 */
242 0092 CF93 push r28
243 0094 DF93 push r29
244 0096 CDB7 in r28,__SP_L__
245 0098 DEB7 in r29,__SP_H__
246 009a 2497 sbiw r28,4
247 009c 0FB6 in __tmp_reg__,__SREG__
248 009e F894 cli
249 00a0 DEBF out __SP_H__,r29
250 00a2 0FBE out __SREG__,__tmp_reg__
251 00a4 CDBF out __SP_L__,r28
252 /* prologue end (size=10) */
253 00a6 8983 std Y+1,r24
254 00a8 9A83 std Y+2,r25
34:shiyan5.c **** uint16_t j;
35:shiyan5.c **** for(j=0;j<n;j++)
256 .LM11:
257 .LBB3:
258 00aa 1B82 std Y+3,__zero_reg__
259 00ac 1C82 std Y+4,__zero_reg__
260 .L17:
261 00ae 2B81 ldd r18,Y+3
262 00b0 3C81 ldd r19,Y+4
263 00b2 8981 ldd r24,Y+1
264 00b4 9A81 ldd r25,Y+2
265 00b6 2817 cp r18,r24
266 00b8 3907 cpc r19,r25
267 00ba 08F0 brlo .L20
268 00bc 0AC0 rjmp .L16
269 .L20:
36:shiyan5.c **** {
37:shiyan5.c **** delay_ms(1000); //延时1s
271 .LM12:
272 00be 88EE ldi r24,lo8(1000)
273 00c0 93E0 ldi r25,hi8(1000)
274 00c2 0E94 0000 call delay_ms
276 .LM13:
277 00c6 8B81 ldd r24,Y+3
278 00c8 9C81 ldd r25,Y+4
279 00ca 0196 adiw r24,1
280 00cc 8B83 std Y+3,r24
281 00ce 9C83 std Y+4,r25
282 00d0 EECF rjmp .L17
38:shiyan5.c **** }
39:shiyan5.c ****
40:shiyan5.c **** }
284 .LM14:
285 .L16:
286 .LBE3:
287 /* epilogue: frame size=4 */
288 00d2 2496 adiw r28,4
289 00d4 0FB6 in __tmp_reg__,__SREG__
290 00d6 F894 cli
291 00d8 DEBF out __SP_H__,r29
292 00da 0FBE out __SREG__,__tmp_reg__
293 00dc CDBF out __SP_L__,r28
294 00de DF91 pop r29
295 00e0 CF91 pop r28
296 00e2 0895 ret
297 /* epilogue end (size=9) */
298 /* function delay_s size 41 (22) */
303 .Lscope2:
306 .global usart1_init
308 usart1_init:
41:shiyan5.c ****
42:shiyan5.c **** void usart1_init(void)
43:shiyan5.c **** {
310 .LM15:
311 /* prologue: frame size=0 */
312 00e4 CF93 push r28
313 00e6 DF93 push r29
314 00e8 CDB7 in r28,__SP_L__
315 00ea DEB7 in r29,__SP_H__
316 /* prologue end (size=4) */
44:shiyan5.c **** UBRR1H=0x00;
318 .LM16:
319 00ec 1092 9800 sts 152,__zero_reg__
45:shiyan5.c **** UBRR1L=0x19;//设置波特率为2400bit/s,当晶振频率为7.3728M时
321 .LM17:
322 00f0 89E1 ldi r24,lo8(25)
323 00f2 8093 9900 sts 153,r24
46:shiyan5.c **** UCSR1A=0X00;
325 .LM18:
326 00f6 1092 9B00 sts 155,__zero_reg__
47:shiyan5.c **** UCSR1B=(1<<RXEN1)|(1<<TXEN1)|(1<<RXCIE1);//接收允许，发送允许，接收中断使能
328 .LM19:
329 00fa 88E9 ldi r24,lo8(-104)
330 00fc 8093 9A00 sts 154,r24
48:shiyan5.c **** UCSR1C=(1<<UPM11)|(0<<UPM10)|(1<<UCSZ11);//异步传输，7个数据位，1个停止位，偶校验（根据MODBUS ASC
332 .LM20:
333 0100 84E2 ldi r24,lo8(36)
334 0102 8093 9D00 sts 157,r24
49:shiyan5.c **** sbi(DDRD,PD4);//CS485为输出，控制max485的发送和接收
336 .LM21:
337 0106 8091 3100 lds r24,49
338 010a 8061 ori r24,lo8(16)
339 010c 8093 3100 sts 49,r24
50:shiyan5.c **** cbi(PORTD,PD4);//max485接收使能
341 .LM22:
342 0110 8091 3200 lds r24,50
343 0114 8F7E andi r24,lo8(-17)
344 0116 8093 3200 sts 50,r24
51:shiyan5.c **** }
346 .LM23:
347 /* epilogue: frame size=0 */
348 011a DF91 pop r29
349 011c CF91 pop r28
350 011e 0895 ret
351 /* epilogue end (size=3) */
352 /* function usart1_init size 30 (23) */
354 .Lscope3:
358 .global sendchar
360 sendchar:
52:shiyan5.c **** void sendchar(char data)//发送
53:shiyan5.c **** {
362 .LM24:
363 /* prologue: frame size=1 */
364 0120 CF93 push r28
365 0122 DF93 push r29
366 0124 CDB7 in r28,__SP_L__
367 0126 DEB7 in r29,__SP_H__
368 0128 2197 sbiw r28,1
369 012a 0FB6 in __tmp_reg__,__SREG__
370 012c F894 cli
371 012e DEBF out __SP_H__,r29
372 0130 0FBE out __SREG__,__tmp_reg__
373 0132 CDBF out __SP_L__,r28
374 /* prologue end (size=10) */
375 0134 8983 std Y+1,r24
54:shiyan5.c **** sbi(PORTD,PD4);//控制max485的发送
377 .LM25:
378 0136 8091 3200 lds r24,50
379 013a 8061 ori r24,lo8(16)
380 013c 8093 3200 sts 50,r24
55:shiyan5.c **** if(!(UCSR1A&(1<<UDRE1)))//等待UDRE被置位，否则对数据寄存器UDR的写操作将被忽略
382 .LM26:
383 0140 8091 9B00 lds r24,155
384 0144 9927 clr r25
385 0146 8072 andi r24,lo8(32)
386 0148 9070 andi r25,hi8(32)
387 014a 0097 sbiw r24,0
388 014c 29F4 brne .L24
56:shiyan5.c **** {
57:shiyan5.c **** UCSR1A|=(1<<UDRE1);
390 .LM27:
391 014e 8091 9B00 lds r24,155
392 0152 8062 ori r24,lo8(32)
393 0154 8093 9B00 sts 155,r24
58:shiyan5.c **** }
59:shiyan5.c **** while(!(UCSR1A&(1<<UDRE1)))//等待发送缓冲器空
395 .LM28:
396 .L24:
397 0158 8091 9B00 lds r24,155
398 015c 9927 clr r25
399 015e 8072 andi r24,lo8(32)
400 0160 9070 andi r25,hi8(32)
401 0162 0097 sbiw r24,0
402 0164 C9F3 breq .L24
60:shiyan5.c **** {;}
61:shiyan5.c **** UDR1=data;//发送数据
404 .LM29:
405 0166 8981 ldd r24,Y+1
406 0168 8093 9C00 sts 156,r24
62:shiyan5.c **** while(!(UCSR1A&(1<<TXC1))){;}
408 .LM30:
409 .L27:
410 016c 8091 9B00 lds r24,155
411 0170 9927 clr r25
412 0172 8074 andi r24,lo8(64)
413 0174 9070 andi r25,hi8(64)
414 0176 0097 sbiw r24,0
415 0178 C9F3 breq .L27
63:shiyan5.c **** //loop_until_bit_is_set(UCSR1A,TXC1);//查询发送是否结束
64:shiyan5.c **** UCSR1A=UCSR1A|(1<<TXC1);//因为没有使用发送结束中断，所以通过置数将TXC清零
417 .LM31:
418 017a 8091 9B00 lds r24,155
419 017e 8064 ori r24,lo8(64)
420 0180 8093 9B00 sts 155,r24
65:shiyan5.c **** cbi(PORTD,PD4);//改为接收状态
422 .LM32:
423 0184 8091 3200 lds r24,50
424 0188 8F7E andi r24,lo8(-17)
425 018a 8093 3200 sts 50,r24
66:shiyan5.c **** return;
67:shiyan5.c **** }
427 .LM33:
428 /* epilogue: frame size=1 */
429 018e 2196 adiw r28,1
430 0190 0FB6 in __tmp_reg__,__SREG__
431 0192 F894 cli
432 0194 DEBF out __SP_H__,r29
433 0196 0FBE out __SREG__,__tmp_reg__
434 0198 CDBF out __SP_L__,r28
435 019a DF91 pop r29
436 019c CF91 pop r28
437 019e 0895 ret
438 /* epilogue end (size=9) */
439 /* function sendchar size 64 (45) */
441 .Lscope4:
444 .global __vector_30
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