sysinfo2.h

mstar 776 开发的车载dvd

//------------------------------------------------------------------------------
#define MVD_CLOCK_144MHZ            0x00
#define MVD_CLOCK_123MHZ            0x01
#define MVD_CLOCK_MIU               0x02
#define MVD_CLOCK_XTAL              0x03

#define MVDBOOT_CLOCK_ENABLE        TRUE
#define MVDBOOT_CLOCK_INVERT        FALSE
#define MVDBOOT_CLOCK_SEL           MVD_CLOCK_MIU
#define MVD_CLOCK_ENABLE            TRUE
#define MVD_CLOCK_INVERT            FALSE
#define MVD_CLOCK_SEL               MVD_CLOCK_144MHZ

//------------------------------------------------------------------------------
// M4VD clock setting
//------------------------------------------------------------------------------
#define M4VD_CLOCK_144MHZ           0x00
#define M4VD_CLOCK_123MHZ           0x01
#define M4VD_CLOCK_108MHZ           0x02
#define M4VD_CLOCK_XTAL             0x03

#define M4VD_CLOCK_ENABLE           FALSE
#define M4VD_CLOCK_INVERT           FALSE
#define M4VD_CLOCK_SEL              M4VD_CLOCK_144MHZ

//------------------------------------------------------------------------------
// DC0 clock setting
//------------------------------------------------------------------------------
#define DC0_CLOCK_SYNC              0x00
#define DC0_CLOCK_FREERUN           0x01
#define DC0_CLOCK_27MHZ             0x02
#define DC0_CLOCK_XTAL              0x03

#define DC0_CLOCK_ENABLE            TRUE
#define DC0_CLOCK_INVERT            FALSE
#define DC0_CLOCK_SEL               DC0_CLOCK_SYNC
*/

//------------------------------------------------------------------------------
// DHCSBM clock setting
//------------------------------------------------------------------------------
#define DHCSBM_CLOCK_12MHZ          0x00
#define DHCSBM_CLOCK_36MHZ          0x01
#define DHCSBM_CLOCK_62MHZ          0x02
#define DHCSBM_CLOCK_XTAL           0x03

#define DHCSBM_CLOCK_ENABLE         TRUE
#define DHCSBM_CLOCK_INVERT         FALSE
#define DHCSBM_CLOCK_SEL            DHCSBM_CLOCK_12MHZ

//------------------------------------------------------------------------------
// GE clock setting
//------------------------------------------------------------------------------
#define GE_CLOCK_123MHZ             0x00
#define GE_CLOCK_108MHZ             0x01
#define GE_CLOCK_86MHZ              0x02
#define GE_CLOCK_72MHZ              0x03

#define GE_CLOCK_ENABLE             TRUE
#define GE_CLOCK_INVERT             FALSE
#define GE_CLOCK_SEL                GE_CLOCK_123MHZ

//------------------------------------------------------------------------------
// GOP GWin clock setting
//------------------------------------------------------------------------------
#define GOP_CLOCK_ODCLK             0x00
#define GOP_CLOCK_IDCLK1            0x01
#define GOP_CLOCK_IDCLK2            0x02
#define GOP_CLOCK_XTAL              0x03

#define GOP0_CLOCK_ENABLE           TRUE
#define GOP0_CLOCK_INVERT           FALSE
#define GOP0_CLOCK_SEL              GOP_CLOCK_ODCLK
#define GOP1_CLOCK_ENABLE           TRUE
#define GOP1_CLOCK_INVERT           FALSE
#define GOP1_CLOCK_SEL              GOP_CLOCK_ODCLK

//------------------------------------------------------------------------------
// GOP DWin clock setting
//------------------------------------------------------------------------------
#define GOPD_CLOCK_ADC              0x00
#define GOPD_CLOCK_ODCLK            0x01
#define GOPD_CLOCK_DC0              0x02
#define GOPD_CLOCK_XTAL             0x03

#define GOPD_CLOCK_ENABLE           TRUE
#define GOPD_CLOCK_INVERT           FALSE
#define GOPD_CLOCK_SEL              GOP_CLOCK_ODCLK

//------------------------------------------------------------------------------
// VD clock setting
//------------------------------------------------------------------------------
#define VD_CLOCK_VD                 0x00
#define VD_CLOCK_0                  0x01
#define VD_CLOCK_TESTMODE           0x02
#define VD_CLOCK_XTAL               0x03

#define VD_CLOCK_ENABLE             TRUE
#define VD_CLOCK_INVERT             FALSE
#define VD_CLOCK_SEL                VD_CLOCK_VD

//------------------------------------------------------------------------------
// VD MCU clock setting
//------------------------------------------------------------------------------
#define VDMCU_CLOCK_54MHZ           0x00
#define VDMCU_CLOCK_61MHZ           0x01
#define VDMCU_CLOCK_30MHZ           0x02
#define VDMCU_CLOCK_108MHZ          0x03
#define VDMCU_CLOCK_86MHZ           0x04
#define VDMCU_CLOCK_MEM             0x05
#define VDMCU_CLOCK_MEMDIV2         0x06
#define VDMCU_CLOCK_36MHZ           0x07

#define VDMCU_CLOCK_ENABLE          TRUE
#define VDMCU_CLOCK_INVERT          FALSE
#define VDMCU_CLOCK_SEL             VDMCU_CLOCK_86MHZ

//------------------------------------------------------------------------------
// VD200 clock setting
//------------------------------------------------------------------------------
#define VD200_CLOCK_216MHZ         0x00
#define VD200_CLOCK_0MHZ0           0x01
#define VD200_CLOCK_0MHZ1           0x02
#define VD200_CLOCK_XTAL            0x03

#define VD200_CLOCK_ENABLE          TRUE
#define VD200_CLOCK_INVERT          FALSE
#define VD200_CLOCK_SEL             VD200_CLOCK_216MHZ

/*
//------------------------------------------------------------------------------
// HDC clock setting
//------------------------------------------------------------------------------
#define HDC_CLOCK_12MHZ             0x00
#define HDC_CLOCK_54MHZ             0x01
#define HDC_CLOCK_62MHZ             0x02
#define HDC_CLOCK_72MHZ             0x03
#define HDC_CLOCK_86MHZ             0x04
#define HDC_CLOCK_108MHZ            0x05
#define HDC_CLOCK_0_0               0x06
#define HDC_CLOCK_0_1               0x07
#define HDC_CLOCK_XTAL              0x08

#define HDC_CLOCK_ENABLE            TRUE
#define HDC_CLOCK_INVERT            FALSE
#define HDC_CLOCK_SEL               HDC_CLOCK_62MHZ

//------------------------------------------------------------------------------
// HDC clock setting
//------------------------------------------------------------------------------
#define HDC_CLOCK_12MHZ             0x00
#define HDC_CLOCK_54MHZ             0x01
#define HDC_CLOCK_62MHZ             0x02
#define HDC_CLOCK_72MHZ             0x03
#define HDC_CLOCK_86MHZ             0x04
#define HDC_CLOCK_108MHZ            0x05
#define HDC_CLOCK_0_0               0x06
#define HDC_CLOCK_0_1               0x07
#define HDC_CLOCK_XTAL              0x08

#define HDC_CLOCK_ENABLE            TRUE
#define HDC_CLOCK_INVERT            FALSE
#define HDC_CLOCK_SEL               HDC_CLOCK_62MHZ
*/

/*
//------------------------------------------------------------------------------
// FICLK_F2 clock setting
//------------------------------------------------------------------------------
#define FICLKF2_CLOCK_IDCLK2        0x00
#define FICLKF2_CLOCK_FCLK          0x01
#define FICLKF2_CLOCK_0             0x02
#define FICLKF2_CLOCK_XTAL          0x03

#define FICLKF2_CLOCK_ENABLE        TRUE
#define FICLKF2_CLOCK_INVERT        FALSE
#define FICLKF2_CLOCK_SEL           FICLKF2_CLOCK_IDCLK2
*/

//------------------------------------------------------------------------------
// FICLK_F2 clock setting
//------------------------------------------------------------------------------
#define FICLKF2_CLOCK_IDCLK2        0x00
#define FICLKF2_CLOCK_FCLK          0x01
#define FICLKF2_CLOCK_IDCLK1        0x02
#define FICLKF2_CLOCK_XTAL          0x03

#define FICLKF2_CLOCK_ENABLE        TRUE
#define FICLKF2_CLOCK_INVERT        FALSE
#define FICLKF2_CLOCK_SEL           FICLKF2_CLOCK_IDCLK2

//------------------------------------------------------------------------------
// FICLK_F1 clock setting
//------------------------------------------------------------------------------
#define FICLKF1_CLOCK_IDCLK2        0x00
#define FICLKF1_CLOCK_FCLK          0x01
#define FICLKF1_CLOCK_IDCLK1        0x02
#define FICLKF1_CLOCK_XTAL          0x03

#define FICLKF1_CLOCK_ENABLE        FALSE
#define FICLKF1_CLOCK_INVERT        FALSE
#define FICLKF1_CLOCK_SEL           FICLKF1_CLOCK_IDCLK1


/*
//------------------------------------------------------------------------------
// PCM clock setting
//------------------------------------------------------------------------------
#define PCM_CLOCK_27MHZ_0           0x00
#define PCM_CLOCK_27MHZ_1           0x01
#define PCM_CLOCK_XTAL_0            0x02
#define PCM_CLOCK_XTAL_1            0x03

#define PCM_CLOCK_ENABLE            TRUE
#define PCM_CLOCK_INVERT            FALSE
#define PCM_CLOCK_SEL               PCM_CLOCK_27MHZ_0

//------------------------------------------------------------------------------
// VE clock setting
//------------------------------------------------------------------------------
#define VE_CLOCK_27MHZ_0            0x00
#define VE_CLOCK_27MHZ_1            0x01
#define VE_CLOCK_XTAL_0             0x02
#define VE_CLOCK_XTAL_1             0x03

#define VE_CLOCK_ENABLE             TRUE
#define VE_CLOCK_INVERT             FALSE
#define VE_CLOCK_SEL                VE_CLOCK_27MHZ_0
*/

//------------------------------------------------------------------------------
// VE DAC clock setting
//------------------------------------------------------------------------------
#define VEDAC_CLOCK_27MHZ           0x00
#define VEDAC_CLOCK_54MHZ           0x01
#define VEDAC_CLOCK_108MHZ          0x02
#define VEDAC_CLOCK_XTAL            0x03

#define VEDAC_CLOCK_ENABLE          TRUE
#define VEDAC_CLOCK_INVERT          FALSE
#define VEDAC_CLOCK_SEL             VEDAC_CLOCK_27MHZ


//------------------------------------------------------------------------------
// DAC clock setting
//------------------------------------------------------------------------------
#define DAC_CLOCK_ODCLK             0x00
#define DAC_CLOCK_VD                0x01
#define DAC_CLOCK_0                 0x02
#define DAC_CLOCK_XTAL              0x03

#define DAC_CLOCK_ENABLE            TRUE
#define DAC_CLOCK_INVERT            FALSE
#define DAC_CLOCK_SEL               DAC_CLOCK_ODCLK

//------------------------------------------------------------------------------
// FCLK clock setting
//------------------------------------------------------------------------------
/*#define FCLK_CLOCK_MPLL             0x00
#define FCLK_CLOCK_MIU              0x01
#define FCLK_CLOCK_ODCLK            0x02
#define FCLK_CLOCK_216MHZ           0x03        // S3+ only
#define FCLK_CLOCK_IDCLK2           0x04
#define FCLK_CLOCK_0_1              0x05
#define FCLK_CLOCK_0_2              0x06
#define FCLK_CLOCK_XTAL_0           0x07
#define FCLK_CLOCK_XTAL_1           0x08

#define FCLK_CLOCK_ENABLE           TRUE
#define FCLK_CLOCK_INVERT           FALSE
#define FCLK_CLOCK_SEL              FCLK_CLOCK_MPLL*/

#define FCLK_CLOCK_MPLL             0x00
#define FCLK_CLOCK_MIU              0x01
#define FCLK_CLOCK_ODCLK            0x02
#define FCLK_CLOCK_IDCLK1           0x03
#define FCLK_CLOCK_IDCLK2           0x04
#define FCLK_CLOCK_0_1              0x05
#define FCLK_CLOCK_0_2              0x06
#define FCLK_CLOCK_XTAL_0           0x07
#define FCLK_CLOCK_XTAL_1           0x08

#define FCLK_CLOCK_ENABLE           TRUE
#define FCLK_CLOCK_INVERT           FALSE
#define FCLK_CLOCK_SEL              FCLK_CLOCK_MPLL

//------------------------------------------------------------------------------
// FMCLK clock setting
//------------------------------------------------------------------------------
/*#define FMCLK_CLOCK_MIU             0x00
#define FMCLK_CLOCK_MPLL            0x01
#define FMCLK_CLOCK_ODCLK           0x02
#define FMCLK_CLOCK_0_0             0x03
#define FMCLK_CLOCK_IDCLK2          0x04
#define FMCLK_CLOCK_0_1             0x05
#define FMCLK_CLOCK_0_2             0x06
#define FMCLK_CLOCK_0_3             0x07
#define FMCLK_CLOCK_DFT             0x08

#define FMCLK_CLOCK_ENABLE          TRUE
#define FMCLK_CLOCK_INVERT          FALSE
#define FMCLK_CLOCK_SEL             FMCLK_CLOCK_MIU*/

#define FMCLK_CLOCK_MIU             0x00
#define FMCLK_CLOCK_MPLL            0x01
#define FMCLK_CLOCK_ODCLK           0x02
#define FMCLK_CLOCK_IDCLK1          0x03
#define FMCLK_CLOCK_IDCLK2          0x04
#define FMCLK_CLOCK_0_1             0x05
#define FMCLK_CLOCK_0_2             0x06
#define FMCLK_CLOCK_0_3             0x07
#define FMCLK_CLOCK_DFT             0x08

#define FMCLK_CLOCK_ENABLE          TRUE
#define FMCLK_CLOCK_INVERT          FALSE
#define FMCLK_CLOCK_SEL             FMCLK_CLOCK_MIU