sysinfo2.h

mstar 776 开发的车载dvd

////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006-2007 MStar Semiconductor, Inc.
// All rights reserved.
//
// Unless otherwise stipulated in writing, any and all information contained
// herein regardless in any format shall remain the sole proprietary of
// MStar Semiconductor Inc. and be kept in strict confidenceb
// (¨MStar Confidential Information〃) by the recipient.
// Any unauthorized act including without limitation unauthorized disclosure,
// copying, use, reproduction, sale, distribution, modification, disassembling,
// reverse engineering and compiling of the contents of MStar Confidential
// Information is unlawful and strictly prohibited. MStar hereby reserves the
// rights to any and all damages, losses, costs and expenses resulting therefrom.
//
////////////////////////////////////////////////////////////////////////////////

#ifndef _SYSINFO_H_
#define _SYSINFO_H_

#include "board.h"
#include "datatype.h"
#include "chip/compat.h"

//------------------------------------------------------------------------------
// Version Info
//------------------------------------------------------------------------------
#define SW_VERSION ("V2.0 "__DATE__)

// Image version info (used in imginfo.c)
#define SW_VERSION_MAJOR            SW_VER_EVENT
#define SW_VERSION_MINOR            SW_VER_NUM
#define SW_VERSION_REVISION         0
#define HW_VERSION                  HW_VER

//------------------------------------------------------------------------------
// Bank Info
//------------------------------------------------------------------------------
#define SYSTEM_BANK_SIZE            0x10000 // 64k

#define SYSTEM_BANK_NUM             10      // Need sync BIN_HEADER_ADDR, SYSTEM_BANK_DATADASE_BASE, and buildsys_X.bat

/*#ifndef SYSTEM_BANK_DATABASE
#define SYSTEM_BANK_DATABASE        0x3E
#endif
#define SYSTEM_BANK_DATABASE0       (SYSTEM_BANK_DATABASE + 0)
#define SYSTEM_BANK_DATABASE1       (SYSTEM_BANK_DATABASE + 1)*/

//
// Code Size
//
#define MCU8051_CODE_BANK_NUM       SYSTEM_BANK_NUM
#define MCU8051_CODE_BANK_SIZE      SYSTEM_BANK_SIZE
#define MCU8051_CODE_SIZE           (MCU8051_CODE_BANK_NUM * MCU8051_CODE_BANK_SIZE)
//#define AEON_CODE_SIZE              MCU8051_CODE_SIZE   //0, Temp assign the same as 8051
#define ECC_DMA_SIZE                ((MCU8051_CODE_SIZE>AEON_CODE_SIZE) ? MCU8051_CODE_SIZE:AEON_CODE_SIZE)
#define BOOTLOADER_BANK_NUM         0x2
#define BOOTLOADER_CODE_SIZE        (BOOTLOADER_BANK_NUM * SYSTEM_BANK_SIZE)

//
// Databasse
//
#define SYSTEM_BANK_DATADASE_BASE   0x3F0000  // The last bank on 4MB flash

//
// Bin
//
#define BIN_HEADER_ADDR             ( (SYSTEM_BANK_NUM)*(SYSTEM_BANK_SIZE) )        // Need sync buildsys_X.bat

//------------------------------------------------------------------------------
#define MHz                         1000000UL
#define KHz                         1000UL

//------------------------------------------------------------------------------
// System Clock
//------------------------------------------------------------------------------
#define SYS_CLK                     MST_XTAL_CLOCK_KHZ

//------------------------------------------------------------------------------
// MIU clock
//------------------------------------------------------------------------------
#ifndef MIU_CLOCK_TARGET
#define MIU_CLOCK_TARGET            FREQ_166MHZ// kevin 071206  //FREQ_120MHZ
#endif

// TODO: review needed
#define MIU_BOOTUP_CLOCK            FREQ_141MHZ

#define MIU_CLOCK                   MIU_CLOCK_REAL(DDFSET(MIU_CLOCK_TARGET)) // real clock

#define MIU_CLOCK_MHZ               (MIU_CLOCK_TARGET / MHz)
#define MIU_BOOTUP_CLOCK_MHZ        (MIU_BOOTUP_CLOCK / MHz)

#define MPLL_CLOCK                  (MST_XTAL_CLOCK_HZ * 15)

#define DDFM                        2
#define DDFSET(clk)                 (MPLL_CLOCK / ((clk) / DDFM / 128))
#define MIU_CLOCK_REAL(ddfset)      (MPLL_CLOCK / (ddfset) * DDFM * 128 + MPLL_CLOCK % (ddfset) * DDFM * 128 / (ddfset))

//------------------------------------------------------------------------------
// MCU clock
//------------------------------------------------------------------------------
#define MCUCLK_54MHZ    0
#define MCUCLK_144MHZ   1
#define MCUCLK_123MHZ   2
#define MCUCLK_108MHZ   3
#define MCUCLK_86MHZ    4
#define MCUCLK_MEM      5
#define MCUCLK_MEMD2    6
#define MCUCLK_36kHz    7
#define MCUCLK_XTAL     8

#define MCUCLK_CLOCK_ENABLE     TRUE
#define MCUCLK_CLOCK_INVERT     FALSE

// Select MCU clock
#ifndef MCU_CLOCK_SEL
#define MCU_CLOCK_SEL   MCUCLK_XTAL
#endif

#define MCU_CLOCK_BOOT  MST_XTAL_CLOCK_HZ

#define MCU_CLOCK       (MCU_CLOCK_SEL == MCUCLK_XTAL   ? MCU_CLOCK_BOOT :     \
                         MCU_CLOCK_SEL == MCUCLK_54MHZ ? FREQ_54MHZ :    \
                         MCU_CLOCK_SEL == MCUCLK_144MHZ ? FREQ_144MHZ :        \
                         MCU_CLOCK_SEL == MCUCLK_123MHZ ? FREQ_123MHZ :        \
                         MCU_CLOCK_SEL == MCUCLK_108MHZ ? FREQ_108MHZ :        \
                         MCU_CLOCK_SEL == MCUCLK_86MHZ ? FREQ_86MHZ :        \
                         MCU_CLOCK_SEL == MCUCLK_MEM    ? MIU_CLOCK :          \
                         MCU_CLOCK_SEL == MCUCLK_MEMD2  ? (MIU_CLOCK / 2) :    \
                         MCU_CLOCK_BOOT)

//------------------------------------------------------------------------------
// SPI clock
//------------------------------------------------------------------------------
// kevin JJ
#define SPICLK_27MHZ    0
#define SPICLK_36MHZ    1
#define SPICLK_43MHZ    2
#define SPICLK_54MHZ    3
#define SPICLK_72MHZ    4
#define SPICLK_86MHZ    5
#define SPICLK_108MHZ   6
#define SPICLK_XTAL     7

#define SPICLK_CLOCK_ENABLE     TRUE
#define SPICLK_CLOCK_INVERT     FALSE

// Select MCU clock
#ifndef SPI_CLOCK_SEL
#define SPI_CLOCK_SEL   SPICLK_XTAL
#endif

#define SPI_CLOCK
//------------------------------------------------------------------------------


//------------------------------------------------------------------------------
// Timer tick period
//------------------------------------------------------------------------------
#define ISR_TIMER0_PERIOD_US        1000UL  // : 1000us, unit:us, Timer 0 Interrupt period
#define ISR_TIMER2_PERIOD_US        4000UL  // 1000UL  // : 1000us, unit:us, Timer 2 Interrupt period
#define ISR_TIMER2_XTAL_PERIOD_US   10000UL // :   10ms, unit:us, Timer 2 Interrupt period(XTAL)

#define ISR_TIMER0_COUNTER          TIMER_RELOAD(MCU_CLOCK, ISR_TIMER0_PERIOD_US)
#define ISR_TIMER0_COUNTER_XTAL     TIMER_RELOAD(MST_XTAL_CLOCK_HZ, ISR_TIMER0_PERIOD_US)

#define ISR_TIMER2_COUNTER          TIMER_RELOAD(MCU_CLOCK, ISR_TIMER2_PERIOD_US)
#define ISR_TIMER2_COUNTER_XTAL     TIMER_RELOAD(MST_XTAL_CLOCK_HZ, ISR_TIMER2_XTAL_PERIOD_US)

#define TIMER_RELOAD(mcuclk, time)  (0x10000UL - TIMER_CLOCK(mcuclk, time))
#define TIMER_CLOCK(mcuclk, time)   ((MCU_CLOCK_KHZ(mcuclk) * (time)) /(12UL * KHz))
#define MCU_CLOCK_KHZ(mcuclk)       ((mcuclk)/KHz)

#define USER_TIMER_PERIOD           1000                        // timer0 intr count per tick

//------------------------------------------------------------------------------
// UART baudrate clock
//------------------------------------------------------------------------------
#define UART_TRADITIONAL            0x00
#define UART_REL                    0x01

#define UART_TYPE                   UART_REL    // UART_TRADITIONAL

// Baudrate for UART: 4800 / 9600 / 19200 / 38400
#ifndef UART0_BAUDRATE
    #define UART0_BAUDRATE          38400
    #define UART0_XMODEM_BAUDRATE   115200      // For UART download using 1K XMODEM
#endif

#define UART1_BAUDRATE              38400//9600

// for 8051 timer1 mode2
#define UART_CLK(clk51, baud)       (256UL - (((clk51) + (baud) * 12UL * 16UL / 2UL) / ((baud) * 12UL * 16UL)))
#define UART_CLKREL(clk51, baud)    (1024UL - (((2UL * (clk51))+((baud) * 32UL))/((baud) * 64UL)))

#define UART_BAUDRATE_CLK_BOOT      UART_CLK(MCU_CLOCK_BOOT, UART0_BAUDRATE)
#define UART_BAUDRATE_CLK           UART_CLK(MCU_CLOCK, UART0_BAUDRATE)
#define UART_BAUDRATE_CLKREL_BOOT   UART_CLKREL(MCU_CLOCK_BOOT, UART0_BAUDRATE)
#define UART_BAUDRATE_CLKREL        UART_CLKREL(MCU_CLOCK, UART0_BAUDRATE)

#define PC_POLLING_COUNTER          30  // (30/TIMER_PERIOD)
#define VIDEO_POLLING_COUNTER       30  // (30/TIMER_PERIOD)

//------------------------------------------------------------------------------
// BIU clock
//------------------------------------------------------------------------------
#ifndef BIU_MCUCLK_DIVIDER
#define BIU_MCUCLK_DIVIDER          4
#endif

#if (BIU_MCUCLK_DIVIDER != 1 && BIU_MCUCLK_DIVIDER != 4)
#error "BIU_MCUCLK_DIVIDER must be 1 or 4"
#endif

#define BIU_CLOCK                   (MCU_CLOCK_SEL == MCUCLK_XTAL ? MCU_CLOCK : MCU_CLOCK / BIU_MCUCLK_DIVIDER)
#define BIU_CLOCK_BOOT              MCU_CLOCK_BOOT

/*
//------------------------------------------------------------------------------
// USB clock setting
//------------------------------------------------------------------------------
#define USB_CLOCK_ENABLE            TRUE
#define USB_CLOCK_INVERT            FALSE

//------------------------------------------------------------------------------
// DDR clock setting
//------------------------------------------------------------------------------
#define DDR_CLOCK_200_266MHZ        0x00
#define DDR_CLOCK_170MHZ            0x01
#define DDR_CLOCK_123MHZ            0x02
#define DDR_CLOCK_108MHZ            0x03

#define DDR_CLOCK_ENABLE            TRUE
#define DDR_CLOCK_INVERT            FALSE
#define DDR_CLOCK_SEL               DDR_CLOCK_200_266MHZ
*/

//------------------------------------------------------------------------------
// MIU clock setting
//------------------------------------------------------------------------------
#define MIU_CLOCK_108MHZ			0x00
#define MIU_CLOCK_100MHZ            0x01
#define MIU_CLOCK_143MHZ            0x02
#define MIU_CLOCK_123MHZ            0x03

#define MIU_CLOCK_ENABLE            TRUE
#define MIU_CLOCK_INVERT            FALSE
#define MIU_CLOCK_SEL               MIU_CLOCK_108MHZ    // kevin ?

#if 1 // It can not mask this part,because system doesn't work for Jupiter
//------------------------------------------------------------------------------
// TS0 clock setting
//------------------------------------------------------------------------------
#define TS0_CLOCK_TS0               0x00
#define TS0_CLOCK_TS2               0x01
#define TS0_CLOCK_0                 0x02
#define TS0_CLOCK_XTAL              0x03

#define TS0_CLOCK_ENABLE            TRUE
#define TS0_CLOCK_INVERT            FALSE
#define TS0_CLOCK_SEL               TS0_CLOCK_TS0

//------------------------------------------------------------------------------
// TCK clock setting
//------------------------------------------------------------------------------
#define TCK_CLOCK_ENABLE            TRUE
#define TCK_CLOCK_INVERT            FALSE

//------------------------------------------------------------------------------
// AEON clock setting
//------------------------------------------------------------------------------
#define AEON_CL0CK_ENABLE           FALSE
#define AEON_CLOCK_INVERT           FALSE


//------------------------------------------------------------------------------
// TSP clock setting
//------------------------------------------------------------------------------
#define TSP_CLOCK_144MHZ            0x00
#define TSP_CLOCK_123MHZ            0x01
#define TSP_CLOCK_72MHZ             0x02
#define TSP_CLOCK_XTAL              0x03

#define TSP_CLOCK_ENABLE            TRUE
#define TSP_CLOCK_INVERT            FALSE
#define TSP_CLOCK_SEL               TSP_CLOCK_144MHZ

//------------------------------------------------------------------------------
// STC0 clock setting
//------------------------------------------------------------------------------
#define STC0_CLOCK_STC0             0x00
#define STC0_CLOCK_1                0x01
#define STC0_CLOCK_27MHZ            0x02
#define STC0_CLOCK_XTAL             0x03

#define STC0_CLOCK_ENABLE           TRUE
#define STC0_CLOCK_INVERT           FALSE
#define STC0_CLOCK_SEL              STC0_CLOCK_27MHZ
#endif

/*
//------------------------------------------------------------------------------
// MAD STC clock setting
//------------------------------------------------------------------------------
#define MADSTC_CLOCK_STC0           0x00
#define MADSTC_CLOCK_1              0x01
#define MADSTC_CLOCK_27MHZ          0x02
#define MADSTC_CLOCK_XTAL           0x03

#define MADSTC_CLOCK_ENABLE         TRUE
#define MADSTC_CLOCK_INVERT         FALSE
#define MADSTC_CLOCK_SEL            MADSTC_CLOCK_STC0

//------------------------------------------------------------------------------
// MVD clock setting