dac_crt.h

mstar 776 开发的车载dvd

/******************************************************************************
 Copyright (c) 2004 MStar Semiconductor, Inc.
 All rights reserved.

 [Module Name]: DAC_CRT.h
 [Date]:        12-Nov-2004
 [Comment]:
   Dac output parameters include file.
 [Reversion History]:
*******************************************************************************/
#ifndef __DAC_CRT_H
#define __DAC_CRT_H

#include "board.h"

//////////////////////////////////////////////
// DAC output
//////////////////////////////////////////////
#define PANEL_DAC_OUTPUT

#define PANEL_DAC_INTERLACE     0
#define PANEL_DAC_I1440_MODE    0
#define PANEL_DAC_INV_FIELD     0

#define PANEL_DAC_SVM           _PNL_FUNC_EN_

///////////////////////////////////////////////
// Common setting
///////////////////////////////////////////////
#define PANEL_NAME      "CRT DAC"

///////////////////////////////////////////////
// Enable function
///////////////////////////////////////////////
#define _PNL_FUNC_EN_           -1 // 0 = disable

#define PANEL_DITHER            0 // 8/6 bits panel

#define PANEL_TTL               _PNL_FUNC_EN_
#define PANEL_DTCON              0
#define PANEL_LVDS              0
#define PANEL_RSDS              0

#define PANEL_DUAL_PORT         0
#define PANEL_SWAP_PORT         0
#define PANEL_SWAP_ODD_ML       0
#define PANEL_SWAP_EVEN_ML      0
#define PANEL_SWAP_ODD_RB       0
#define PANEL_SWAP_EVEN_RB      0

#define PANEL_SWAP_LVDS_POL     0
#define PANEL_SWAP_LVDS_CH      0

#define PANEL_LVDS_TI_MODE      0

#define PANEL_DCLK_DELAY        0x08
#define PANEL_INV_DE            0
#define PANEL_INV_DCLK          0
#define PANEL_INV_HSYNC         0
#define PANEL_INV_VSYNC         0

// Lock Y line
#define PANEL_LOCK_Y_LINE       0

///////////////////////////////////////////////
// Aspect Ratio setting
///////////////////////////////////////////////

//
// Aspect ratio type
//
#define PANEL_ASPECT_RATIO_4_3     0
#define PANEL_ASPECT_RATIO_WIDE    1
#define PANEL_ASPECT_RATIO_OTHER   2

//
// Select aspect ratio
//
#define PANEL_ASPECT_RATIO  PANEL_ASPECT_RATIO_WIDE

///////////////////////////////////////////////
// Output tmming setting
///////////////////////////////////////////////
#define PANEL_DCLK_CURRENT          0x01 // DCLK current
#define PANEL_DE_CURRENT            0x01 // DE signal current
#define PANEL_ODD_DATA_CURRENT      0x01 // odd data current
#define PANEL_EVEN_DATA_CURRENT     0x01 // even data current

#define PANEL_ON_TIMING1            0 // time between panel & data while turn on power
#define PANEL_ON_TIMING2            0 // time between data & back light while turn on power
#define PANEL_OFF_TIMING1           0  // time between back light & data while turn off power
#define PANEL_OFF_TIMING2           0  // time between data & panel while turn off power

#define PANEL_DAC_INTERLACE_BIT     _BIT0
#define PANEL_DAC_INV_FIELD_BIT     _BIT1
#define PANEL_DAC_SHIFT_RIGHT_BIT   _BIT2
#define PANEL_DAC_I1440_MODE_BIT    _BIT4

#define PANEL_REDUCE_DE_SIZE_BIT    _BIT0
#define PANEL_DOUBLE_OSD_X_BIT      _BIT1
#define PANEL_DOUBLE_OSD_Y_BIT      _BIT2

#define PANEL_REDUCE_DE_SIZE        8

////////////////////////////////////////////////////
// Panel select definition
////////////////////////////////////////////////////
// timing stucture
typedef struct _PanelDataType
{
    U16 DEVstart; // vertical DE start
    U8 HsyncShiftOffset;//use for interlace out
    U8 HSyncWidth; // HSync width
    U16 HSyncBackPorch; // HSync back porch
    U16 VSyncWidth; // VSync Width
    U16 VSyncBackPorch; // VSync back porch
    U16 DeWidth; // DE width
    U16 DeHeight; // DE height
    U16 HTotal; // horizontal total
    U16 VTotal; // vertical total
    U32 OuputDClk; // output clock
    U8  OutputCtrl; // output flag
    U8  ExtendFlag; // extend flag
}PanelDataType;

typedef struct _ScanType
{
    U16 wHt;
    U16 wVt;
    U16 wHtotal;
    U16 wVtotal;
    U16 wVend;
    U8  ucHshift;
    U8  ucX;
    U8  ucY;
}ScanType;

// output timing selection
typedef enum _PanelSelectType
{
    DAC_FOR_PAL_3375K,
    DAC_FOR_NTSC_3375K,
    DAC_FOR_VGA_3375K,
    DAC_FOR_YPBPR_3375K,
//    DAC_FOR_1080_3375K,
    DAC_FOR_PAL_3375K_75I,
    DAC_FOR_NTSC_3375K_90I,
    DAC_FOR_PAL_3375K_100I,
    DAC_FOR_NTSC_3375K_120I,
    DAC_FOR_NTSC_3375K_60I,
#ifdef  MULTI_HSYNC
    DAC_FOR_PAL_315K,
    DAC_FOR_NTSC_315K,
    DAC_FOR_VGA_315K,
    DAC_FOR_720P_315K,
    DAC_FOR_1080_315K,
    DAC_FOR_PAL_315K_100I,
    DAC_FOR_NTSC_315K_120I,

    DAC_FOR_PAL_375K,
    DAC_FOR_NTSC_375K,
    DAC_FOR_VGA_375K,
    DAC_FOR_720P_375K,
    DAC_FOR_1080_375K,
    DAC_FOR_PAL_375K_100I,
    DAC_FOR_NTSC_375K_120I,
#endif
    DAC_UNKNOWN,
    PANEL_SELECT_NUMS
}PanelSelectType;

#define DEFAULT_OUTPUT_H_FREQ   (33750ul)
#define DEFAULT_OUTPUT_V_FREQ   60//50

////////////////////////////////////////////////////
// Panel power sequence
////////////////////////////////////////////////////
extern U16 pnl_crt_GetDeVStart(PanelSelectType PnlSel);
extern U8  pnl_crt_GetHSyncShift(PanelSelectType PnlSel);
extern U8  pnl_crt_GetHSyncWidth(PanelSelectType PnlSel);
extern U16 pnl_crt_GetHSyncBackPorch(PanelSelectType PnlSel);
extern U16 pnl_crt_GetVSyncWidth(PanelSelectType PnlSel);
extern U16 pnl_crt_GetVSyncBackPorch(PanelSelectType PnlSel);
extern U16 pnl_crt_GetDeWidth(PanelSelectType PnlSel);
extern U16 pnl_crt_GetDeHeight(PanelSelectType PnlSel);
extern U16 pnl_crt_GetHTotal(PanelSelectType PnlSel);
extern U16 pnl_crt_GetVTotal(PanelSelectType PnlSel);
extern U16 pnl_crt_GetHStart(PanelSelectType PnlSel);
extern U32 pnl_crt_GetOuputDClk(PanelSelectType PnlSel);
extern U8  pnl_crt_GetOutputCtrl(PanelSelectType PnlSel);
extern U8  pnl_crt_ExtendFlag(PanelSelectType PnlSel);

extern U16 pnl_crt_GetScanHt(PanelSelectType PnlSel);
extern U16 pnl_crt_GetScanVt(PanelSelectType PnlSel);
extern U16 pnl_crt_GetScanHtotal(PanelSelectType PnlSel);
extern U16 pnl_crt_GetScanVtotal(PanelSelectType PnlSel);
extern U16 pnl_crt_GetScanVend(PanelSelectType PnlSel);
extern U8  pnl_crt_GetScanHshift(PanelSelectType PnlSel);
extern U8  pnl_crt_GetScanX(PanelSelectType PnlSel);
extern U8  pnl_crt_GetScanY(PanelSelectType PnlSel);

#define PANEL_HSYNC_SHIFT       pnl_crt_GetHSyncShift(g_u8CRT_OutTimingSel)
#define PANEL_HSYNC_WIDTH       pnl_crt_GetHSyncWidth(g_u8CRT_OutTimingSel)
#define PANEL_HSYNC_BACK_PORCH  pnl_crt_GetHSyncBackPorch(g_u8CRT_OutTimingSel)
#define PANEL_VSYNC_WIDTH       pnl_crt_GetVSyncWidth(g_u8CRT_OutTimingSel)
#define PANEL_VSYNC_BACK_PORCH  pnl_crt_GetVSyncBackPorch(g_u8CRT_OutTimingSel)

#if (ISCANENABLE)
#define PANEL_HSTART            pnl_crt_GetHStart(g_u8CRT_OutTimingSel)
#else
#define PANEL_HSTART            (PANEL_HSYNC_WIDTH+PANEL_HSYNC_BACK_PORCH)
#endif
#define PANEL_VSTART            (PANEL_VSYNC_WIDTH+PANEL_VSYNC_BACK_PORCH)
#define PANEL_WIDTH             pnl_crt_GetDeWidth(g_u8CRT_OutTimingSel)
#define PANEL_HEIGHT            pnl_crt_GetDeHeight(g_u8CRT_OutTimingSel)
#define PANEL_HTOTAL            pnl_crt_GetHTotal(g_u8CRT_OutTimingSel)
#define PANEL_VTOTAL            pnl_crt_GetVTotal(g_u8CRT_OutTimingSel)

#define PANEL_DCLK              pnl_crt_GetOuputDClk(g_u8CRT_OutTimingSel)
#define PANEL_MAX_DCLK          PANEL_DCLK
#define PANEL_MIN_DCLK          PANEL_DCLK
#define PANEL_MAX_HTOTAL        PANEL_HTOTAL
#define PANEL_MIN_HTOTAL        PANEL_VTOTAL
#define PANEL_MAX_VTOTAL        PANEL_VTOTAL
#define PANEL_MIN_VTOTAL        PANEL_VTOTAL

#define PANEL_FLAG              pnl_crt_GetOutputCtrl(g_u8CRT_OutTimingSel)
#define PANEL_EXTEND_FLAG       pnl_crt_ExtendFlag(g_u8CRT_OutTimingSel)

////////////////////////////////////////////////////////////////////////
// Output timing selection
////////////////////////////////////////////////////////////////////////
#define DEFAULT_PANEL_SELECT        DAC_FOR_VGA_3375K//DAC_FOR_RESET
/*
#define DEFAULT_PANEL_PC            DAC_FOR_VGA_3375K
#define DEFAULT_PANEL_VIDEO_60      DAC_FOR_NTSC_3375K
#define DEFAULT_PANEL_VIDEO_50      DAC_FOR_PAL_3375K
#define DEFAULT_PANEL_YUV           DAC_FOR_PAL_3375K
#define DEFAULT_PANEL_VIDEO_120i    DAC_FOR_NTSC_3375K_120I
#define DEFAULT_PANEL_VIDEO_100i    DAC_FOR_PAL_3375K_100I
*/

//#define PANEL_DIMMING_CTL				0x80
#define PANEL_DIMMING_CTL				0x3f
#define PANEL_MAX_PWM_DIM				0xE6
#define PANEL_MIN_PWM_DIM				0x20


#endif // __DAC_CRT_H