rf_tuner_atsc.h

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/******************************************************************************
 Copyright (c) 2006 MStar Semiconductor, Inc.
 All rights reserved.

 [Module Name]: RF_Tuner_ATSC.h
 [Date]:        28-Aug-2006
 [Comment]:
   TV tuner header file.
 [Reversion History]:
*******************************************************************************/

#ifndef _TUNER_ATSC_H_
#define _TUNER_ATSC_H_
#include "Board.h"

#ifdef _TUNER_ATSC_C_
#define INTERFACE
#else
#define INTERFACE extern
#endif

typedef enum
{
	DEMOD_TYPE_NTSC,
	DEMOD_TYPE_256QAM,
	DEMOD_TYPE_64QAM,
	DEMOD_TYPE_8VSB,
	DEMOD_TYPE_NUM
} EN_DEMOD_TYPE;

typedef enum ADC_PATTERN
{
	 BOTTOM_STABLE_POINT, 	// 0 adc pattern .
	 LOW_STABLE_POINT,  	// 1 adc pattern.
	 MATCH_STABLE_POINT,  	// 2 adc pattern.
	 HIGH_STABLE_POINT,  	// 3 adc pattern.
	 UNSTABLE_POINT 		// 4 adc pattern.
} ADC_PATTERN_T;

#if (FRONTEND_TUNER_TYPE == THOMSON_DTT7630_TUNER)
#define Offset_P_62500Hz 13
#define Offset_P_87500Hz 12
#define Offset_P_122500Hz 11
#define Offset_P_137500Hz 10
#define Offset_P_162500Hz 9
#define Offset_P_187500Hz 8
#define Offset_N_62500Hz 2
#define Offset_N_87500Hz 3
#define Offset_N_122500Hz 4
#define Offset_N_137500Hz 5
#define Offset_N_162500Hz 6
#define Offset_N_187500Hz 7

#define TUA6030_devAddr                         0xC2
#define FREQ_STEP                                       62.5 //Khz
#define IF_FREQ                                         44000  //44MHz
#define IF_STEP                                         704     //IF_FREQ/FREQ_STEP
#define TDA9885_devAddr                         0x84
#define TUNER_PLL_STABLE_TIME 50
#define NTSC_TUNER_PLL_STABLE_TIME 50

#elif (FRONTEND_TUNER_TYPE == PHILIPS_FQD1236_TUNER)

#define TUA6030_devAddr						0xC2
#define FREQ_STEP							 	62.5 //Khz
#define IF_FREQ                                         44000  //44MHz
#define IF_STEP                                         704     //IF_FREQ/FREQ_STEP
#define TDA9885_devAddr						0x84
#define TUNER_PLL_STABLE_TIME 50
#define NTSC_TUNER_PLL_STABLE_TIME 50

#elif (FRONTEND_TUNER_TYPE == ALPS_TDQU4_TUNER)

#define ALPS_TDQU4_devAddr						0xc0
#define FREQ_STEP							 	62.5 //Khz
#define IF_FREQ                                         44000  //44MHz
#define IF_STEP                                         704     //IF_FREQ/FREQ_STEP
#define TUNER_PLL_STABLE_TIME 50

#define RANGE_OF_AFT_WIN 24//1500   //KHz
#define LEFT_OF_AFT_WIN      6//400 //KHz
#define LARGE_FREQ_OFFSET_CHECK    8//500   //62.5*8 KHz,    FREQ_STEP=62.5
#define MEDIUM_FREQ_OFFSET_CHECK    5//250   //62.5*4 KHz,    FREQ_STEP=62.5
#define SMALL_FREQ_OFFSET_CHECK 2//125     //62.5*2KHz,    FREQ_STEP=62.5
#define RANGE_OF_AFT_COUNT RANGE_OF_AFT_WIN/LARGE_FREQ_OFFSET_CHECK+1
#define RANGE_OF_AFT_COUNT2 LARGE_FREQ_OFFSET_CHECK/SMALL_FREQ_OFFSET_CHECK
#define AFT_SIGNAL_EXIST_THR    0x24
#define AFT_WAIT_TIME       10  //ms
#define AFT_LARGE_FREQ_OFFSET 0x06
#define AFT_HB_NO_FREQ_OFFSET 0x2E
#define AFT_LB_NO_FREQ_OFFSET 0x18
#define AFT_FORCE_LEAVE_DEADLOCK 15
#define NTSC_TUNER_PLL_STABLE_TIME 50

#elif (FRONTEND_TUNER_TYPE==SAMSUNG_S205_TUNER)

#define SAMSUNG_TUNER_I2C_ADDR		0xC2
#define FREQ_STEP								 	50 //Khz
#define IF_FREQ                                         44000  //44MHz
#define IF_STEP                                         880     //IF_FREQ/FREQ_STEP
#define TUNER_PLL_STABLE_TIME 50

//define lock range of AFT value
//Modify for Saturn2 SAR is 3.3V
#define MIN_AFT_VALUE					0x7//		0x0E//0x1A//0x20
#define MAX_AFT_VALUE					0x19//		0x2B//0x2B
#define MAX_ZIG_ZAG_NUM 7
#define NTSC_TUNER_PLL_STABLE_TIME 20       //normally is smaller then 6ms
#elif (FRONTEND_TUNER_TYPE==NXP_TD1636ALMK2_TUNER)

#define NXP_TUNER_I2C_ADDR			0xC2
#define FREQ_STEP						50 //Khz
#define IF_FREQ                        	44000  //44MHz
#define IF_STEP                         880     // =(IF_FREQ/FREQ_STEP)
#define TUNER_PLL_STABLE_TIME 		50

//define lock range of AFT value
//Modify for Saturn2 SAR is 3.3V
#define MIN_AFT_VALUE					0x18//0x7//		0x0E//0x1A//0x20
#define MAX_AFT_VALUE					0x25//0x2B//		0x19//0x2B
#define MAX_ZIG_ZAG_NUM 				7
#define NTSC_TUNER_PLL_STABLE_TIME 		50       // Oscillator lock-in-time in spec Max=50ms Type=20ms
#elif (FRONTEND_TUNER_TYPE == SHARP_VA1Y2UR2201_TUNER)    //1031angus
#define SHARP_TUNER_I2C_ADDR				0xC2
#define FREQ_STEP						 	62.5 //Khz
#define IF_FREQ                                         44000  //44MHz
#define IF_STEP                                         704     //IF_FREQ/FREQ_STEP
#define TUNER_PLL_STABLE_TIME 50

//define lock range of AFT value    //should be modify after get the demo board
#define MIN_AFT_VALUE						0x1A//0x20
#define MAX_AFT_VALUE						0x2B//0x2B

#define JUMP_NUMBER 12
#define FOUR_TIMES_SAMPLING_FREQ 4//250    //62.5*4
    const S8 code JUMP_TABLE[ JUMP_NUMBER ]
    	= {
    		-FOUR_TIMES_SAMPLING_FREQ, FOUR_TIMES_SAMPLING_FREQ,
      		-FOUR_TIMES_SAMPLING_FREQ*2, FOUR_TIMES_SAMPLING_FREQ*2,
      		-FOUR_TIMES_SAMPLING_FREQ*3, FOUR_TIMES_SAMPLING_FREQ*3,
      		-FOUR_TIMES_SAMPLING_FREQ*4, FOUR_TIMES_SAMPLING_FREQ*4,
      		-FOUR_TIMES_SAMPLING_FREQ*5, FOUR_TIMES_SAMPLING_FREQ*5,
      		-FOUR_TIMES_SAMPLING_FREQ*6, FOUR_TIMES_SAMPLING_FREQ*6
      	  };
#if 1
    const S8 code TRACK_TABLE[ JUMP_NUMBER ]
    	= {
    		-1, 1,
      		-2, 2,
      		-3, 3,
      		-4, 4,
      		-5, 5,
      		-6, 6
      	  };
#else
    const S32 code TRACK_TABLE[ JUMP_NUMBER ]
    	= {
    		-FREQ_STEP, FREQ_STEP,
      		-FREQ_STEP*2, FREQ_STEP*2,
      		-FREQ_STEP*3, FREQ_STEP*3,
      		-FREQ_STEP*4, FREQ_STEP*4,
      		-FREQ_STEP*5, FREQ_STEP*5,
      		-FREQ_STEP*6, FREQ_STEP*6
      	  };
#endif
#define NTSC_TUNER_PLL_STABLE_TIME 50

#elif (FRONTEND_TUNER_TYPE == LG_TDVS_H703P_TUNER)

#define Offset_P_62500Hz 13
#define Offset_P_87500Hz 12
#define Offset_P_122500Hz 11
#define Offset_P_137500Hz 10
#define Offset_P_162500Hz 9
#define Offset_P_187500Hz 8
#define Offset_N_62500Hz 2
#define Offset_N_87500Hz 3
#define Offset_N_122500Hz 4
#define Offset_N_137500Hz 5
#define Offset_N_162500Hz 6
#define Offset_N_187500Hz 7

#define LG_TUNER_I2C_ADDR				0xC2
#define FREQ_STEP						 	62.5 //Khz
#define TDA9885_devAddr						0x86
#define IF_FREQ                                         44000  //44MHz
#define IF_STEP                                         704     //IF_FREQ/FREQ_STEP
#define TUNER_PLL_STABLE_TIME 50
#define NTSC_TUNER_PLL_STABLE_TIME 50

#endif


#if ((FRONTEND_TUNER_TYPE == THOMSON_DTT7630_TUNER)||(FRONTEND_TUNER_TYPE == PHILIPS_FQD1236_TUNER))
INTERFACE BOOLEAN TDA9885_Init(void);
#endif

#if (FRONTEND_TUNER_TYPE==SAMSUNG_S205_TUNER)
INTERFACE U8 DRV_TDA6651_GetChargePumpData(U32 u32freq);
#endif

INTERFACE BOOLEAN Set_Tuner_Freq(U16 u16Frequency, EN_DEMOD_TYPE enModulation);
INTERFACE BOOLEAN NTSC_IF_ReadStatus(U8 * AFT_Status);

#undef INTERFACE


#endif