pnl_cpt07_at.h

mstar 776 开发的车载dvd

/******************************************************************************
 Copyright (c) 2003 MStar Semiconductor, Inc.
 All rights reserved.

 [Module Name]: Pnl_CPT07_AT.h
 [Date]:	14-Dec-2005
 [Comment]:
   Panel parameters.[A070Fw03] 480(1440/3)x234
 [Reversion History]:
*******************************************************************************/

#ifndef __CPT_07A_H
#define __CPT_07A_H

#include "board.h"
#include "analog_reg.h"
///////////////////////////////////////////////
// Common setting
///////////////////////////////////////////////
#define PANEL_NAME          "CPT07_AT"
#define PANEL_DOT_WIDTH     107		// unit: um
#define PANEL_DOT_HEIGHT    370		// unit: um

#define USE_PRIVATE_GAMMA_TABLE
#define USE_CUSTOMER_COLOR_SETTING 0

#define PANEL_ASPECT_RATIO_4_3     0
#define PANEL_ASPECT_RATIO_WIDE    1
#define PANEL_ASPECT_RATIO_OTHER   2


#define PANEL_ASPECT_RATIO  PANEL_ASPECT_RATIO_WIDE

///////////////////////////////////////////////
// Enable function
///////////////////////////////////////////////
#define _PNL_FUNC_EN_           -1 // 0 = disable

//////////////////////////////////////////////
// Panel output
//////////////////////////////////////////////
#define PANEL_DITHER            0   // 8/6 bits panel

#define PANEL_TTL               0
#define PANEL_DTCON              0
#define PANEL_ATCON       _PNL_FUNC_EN_
#define PANEL_LVDS              0
#define PANEL_RSDS              0
#define PANEL_LTCON             0


#define PANEL_DUAL_PORT         0
#define PANEL_SWAP_PORT         0
#define PANEL_SWAP_ODD_ML       0
#define PANEL_SWAP_EVEN_ML      0
#define PANEL_SWAP_ODD_RB       0
#define PANEL_SWAP_EVEN_RB      0

#define PANEL_SWAP_LVDS_POL     0
#define PANEL_SWAP_LVDS_CH      0

#define PANEL_LVDS_TI_MODE      0

#define PANEL_DCLK_DELAY        0x0             // Range (0~F)
#define PANEL_INV_DCLK          _PNL_FUNC_EN_   // Invert output DCLK
#define PANEL_INV_DE            0               // Invert output DE
#define PANEL_INV_VSYNC         0               // Invert output VSYNC
#define PANEL_INV_HSYNC         0               // Invert output HSYNC

// Lock Y line
#define PANEL_LOCK_Y_LINE           0
#define PANEL_SYNC_MODE_1           0
#define DISABLE_SHORT_FRAME_TUNE    0
#define DISABLE_SHORT_LINE_TUNE     1

///////////////////////////////////////////////
// Output tmming setting
///////////////////////////////////////////////
// driving current setting (0x00=4mA, 0x01=6mA, 0x02=8mA, 0x03=12mA)
#define PANEL_DCLK_CURRENT      0x01    // DCLK current
#define PANEL_DE_CURRENT        0x01    // DE signal current
#define PANEL_ODD_DATA_CURRENT  0x01    // odd data current
#define PANEL_EVEN_DATA_CURRENT 0x01    // even data current

#define PANEL_ON_TIMING1        30 		// time between panel & data while turn on power
#define PANEL_ON_TIMING2        100		// time between data & back light while turn on power
#define PANEL_OFF_TIMING1       20		// time between back light & data while turn off power
#define PANEL_OFF_TIMING2       20		// time between data & panel while turn off power

#define PANEL_HSYNC_WIDTH       20
#define PANEL_HSYNC_BACK_PORCH  39 // seven

#define PANEL_VSYNC_WIDTH       6
#define PANEL_VSYNC_BACK_PORCH  2 // 23 seven 070830_00

#define PANEL_HSTART            (PANEL_HSYNC_WIDTH + PANEL_HSYNC_BACK_PORCH)
#define PANEL_VSTART            (PANEL_VSYNC_WIDTH + PANEL_VSYNC_BACK_PORCH)
#define PANEL_WIDTH             480
#define PANEL_HEIGHT            234 // 236 seven	//+PANEL_VSYNC_WIDTH
#define PANEL_HTOTAL            640
#define PANEL_VTOTAL            270

#define PANEL_MAX_HTOTAL        800
#define PANEL_MIN_HTOTAL        640
#define PANEL_MAX_VTOTAL        750
#define PANEL_MIN_VTOTAL        610
#define PANEL_DCLK              (((U32)PANEL_HTOTAL*PANEL_VTOTAL*60)/1000000)
#define PANEL_MAX_DCLK          49
#define PANEL_MIN_DCLK          39


///////////////////////////////////////////////////////
// TCON setting
///////////////////////////////////////////////////////
// PTC Mode setting
#define SET_PTC_MODE1           0x8E    // mengfu;0x8A	// PTC_MODE1(0xD0)
#define SET_PTC_MODE2           0x6E    // PTC_MODE2(0xD1)
#define SET_PTC_MODE3           0x80    // PTC_MODE3(0xD2)

// PTC Timming Setting
#define SET_FRP_TRAN            0x13	// GPO_FRP_TRAN(0xDC)
#define SET_STH_START           0x2E	// GPO_STH_START(0xDD)
#define SET_STH_WIDTH           0x01	// GPO_STH_WIDTH(0xDE)
#define SET_OEH_START           0x88	// GPO_OEH_START(0xDF)
#define SET_OEH_WIDTH           0x0B	// GPO_OEH_WIDTH(0xE0)
#define SET_OEV_START           0x03	// GPO_OEV_START(0xE1)
#define SET_OEV_WIDTH           0x2A	// GPO_OEV_WIDTH(0xE2)
#define SET_CKV_START           0x28	// GPO_CKV_START(0xE3)
#define SET_CKV_START2          0x00	// GPO_CKV_START2(0xE4)
#define SET_CKV_WIDTH           0x2A	// GPO_CKV_WIDTH(0xE5)

#if ENABLE_NEW_VSYNC_MODE// kevin 071112_2
#define SET_STV_LINE_TH         0x43    /// GPO_STV_LINE_TH(0xE6)
#else
#define SET_STV_LINE_TH         0x44    // mengfu; Addy 0x42	// GPO_STV_LINE_TH(0xE6)
#endif

#define SET_STV_START           0x00	// GPO_STV_START(0xE7)
#define SET_STV_WIDTH           0x00	// GPO_STV_WIDTH(0xE8)
#define SET_OEV2_START          0x04	// GPO_OEV2_START(0xE9)
#define SET_OEV3_START          0x04	// GPO_OEV3_START(0xEA)
#define SET_H_ST_DLY_L          0x04	// H_ST_DLY_L(0xEB)
#define SET_H_ST_DLY_H          0xA4	// H_ST_DLY_H(0xEC)
#define SET_CLK_DLY_SYNC_OUT    0x00	// CLK_DLY_SYNC_OUT(0xED)
#define SET_CKV_END2            0x28	// GPO_CKV_END2(0xEE)
#define SET_Q1H                 0x00	// Q1H_SETTING(0xEF)


#define SET_OEV2_WIDTH          0x54	// GPO_OEV2_WIDTH(0xCD)
#define SET_OEV3_WIDTH          0x54	// GPO_OEV3_WIDTH(0xCE)
#define SET_OEV_DELTA           0x54	// GPO_OEV_DELTA(0xCF)

// seven 070823_00
// VCOM setting
#define SET_BVOM_DC             0x9A    //0x98	//DEF_VCOM_DC	// BVOM_DC(0x43)
#define SET_BVOM_OUT            0xA3    //0xD0	//DEF_VCOM_AC	// BVOM_OUT(0x44)
// end

// DAC setting
#define SET_VDAC_ADJ1           0x04    //0x27	// VADC_ADJ1(0xAA)
#define SET_VDAC_ADJ2           0x00	// VDAC_ADJ2(0xAB)

// Backlight PWM setting
#define SET_BACKLIGHT_PWM       0xB0	// for Bk1.F4h initial setting

//kevin OSD
#define SET_SSC_SPAN            0xEC
#define SET_SSC_STEP            0x19

#define PANEL_DIMMING_CTL				0x80
#define PANEL_MAX_PWM_DIM				0xE6
#define PANEL_MIN_PWM_DIM				0x20

//////////////////////////////////////////////////
// DPWM // kevin 071217
//////////////////////////////////////////////////
#define ENABLE_DPWM_LED         0

#define VIN_STARTUP_H_THRD      0xC2
#define VIN_WRK_H_THRD          0xCB
#define VIN_WRK_L_THRD          0x3F
#define VIN_STARTUP_L_THRD      0x3C

#define ENABLE_BURST_MODE       0
#define ENABLE_VSYNC_MODE       0
#define SET_FAULTZ_HIGH         1
#define ENABLE_PWM_FUNC         1
#define VSYNC_PWM_MODE_SEL      ((ENABLE_PWM_FUNC<<3)|(SET_FAULTZ_HIGH<<2)|(ENABLE_VSYNC_MODE<<1)|(ENABLE_BURST_MODE))

#define FB2_STARTUP             0x00AA
#define FB2_SET                 FB2_STARTUP
#define FB2_CLAMP               0x00AA

#define STRK1_CNT               0x017F

#if ENABLE_DPWM_LED
#define STRK2_CNT               (STRK1_CNT + 0x20)
#else
#define STRK2_CNT               (STRK1_CNT - 0x30)
#endif

#define BURST_CLP               0x0114
#define BURST_DUTY              0x00C8

#endif	// __AU102_H